Re: Hints for Bananapi and -current

[Jared McNeill <jmcneill%invisible.ca@localhost>]

Remove the following devices from your kernel config and the kernel should 
use simplefb instead: sunxidebe, sunxitcon, sunxihdmi, sunxidep

I just peeked at the code quickly and it looks like the DE drivers are 
blindly using the display's advertised preferred mode without taking its 
own capabilities into consideration.


On Wed, 1 May 2019, Frank Kardel wrote:

> I tried -current with my Bananapi an had limited success:
>
> Using the first steps copying the image armv7 and the 2018.05 u-boot I found 
> the u-boot load attempting to perform a dhcp boot as nothing was found on the 
> mmc drive in autoboot. Did I miss somethnig to set up there ?
>
> I finally got a kernel to start booting with following chants:
>
> mmc dev 0
>
> fatload mmc 0:1 $fdt_addr_r $fdtfile
>
> fatload mmc 0:1 82000000 netbsd-GENERIC.ub
>
> bootm 82000000 - $fdt_addr_r root=ld0a console=fb/none
>
> The output always stops at:
>
> [   1.0000000] NetBSD 8.99.37 (GENERIC) #2: Sun Apr 28 10:09:56 CEST 2019
> [   1.0000000] 
> kardel@Andromeda:/src/NetBSD/cur/src/obj.evbarm/sys/arch/evbarm/compile/GENERIC
> [   1.0000000] total memory = 1022 MB
> [   1.0000000] avail memory = 1012 MB
> [   1.0000000] armfdt0 (root)
> [   1.0000000] simplebus0 at armfdt0: LeMaker Banana Pi
> [   1.0000000] simplebus1 at simplebus0
> [   1.0000000] cpus0 at simplebus0
> [   1.0000000] simplebus2 at simplebus0
> [   1.0000000] simplebus3 at simplebus0
> [   1.0000000] cpu0 at cpus0: Cortex-A7 r0p4 (Cortex V7A core)
> [   1.0000000] cpu0: DC enabled IC enabled WB enabled LABT branch prediction 
> enabled
> [   1.0000000] cpu0: 32KB/32B 2-way L1 VIPT Instruction cache
> [   1.0000000] cpu0: 32KB/64B 4-way write-back-locking-C L1 PIPT Data cache
> [   1.0000000] cpu0: 256KB/64B 8-way write-through L2 PIPT Unified cache
> [   1.0000000] vfp0 at cpu0: NEON MPE (VFP 3.0+), rounding, NaN propagation, 
> denormals
> [   1.0000000] cpufreqdt0 at cpu0
> [   1.0000000] cpu1 at cpus0
> [   1.0000000] cpufreqdt1 at cpu1
> [   1.0000000] gic0 at simplebus1: GIC
> [   1.0000000] armgic0 at gic0: Generic Interrupt Controller, 160 sources 
> (150 valid)
> [   1.0000000] armgic0: 16 Priorities, 128 SPIs, 7 PPIs, 15 SGIs
> [   1.0000000] fclock0 at simplebus2: 25000000 Hz fixed clock (mii_phy_tx)
> [   1.0000000] fclock1 at simplebus2: 125000000 Hz fixed clock (gmac_int_tx)
> [   1.0000000] fclock2 at simplebus2: 24000000 Hz fixed clock (osc24M)
> [   1.0000000] fclock3 at simplebus2: 32768 Hz fixed clock (osc32k)
> [   1.0000000] gtmr0 at simplebus0: Generic Timer
> [   1.0000000] gtmr0: interrupting on GIC irq 27
> [   1.0000000] armgtmr0 at gtmr0: ARM Generic Timer (24000 kHz)
> [   1.0000420] sun4ia10ccu0 at simplebus1: A20 CCU
> [   1.0000420] sunxinmi0 at simplebus1: NMI
> [   1.0000420] sunxigmacclk0 at simplebus2: GMAC MII/RGMII clock mux
> [   1.0000420] sunxigpio0 at simplebus1: PIO
> [   1.0000420] gpio0 at sunxigpio0: 175 pins
> [   1.0000420] sunxigpio0: interrupting on GIC irq 60
> [   1.0000420] sunxisramc0 at simplebus1: SRAM Controller
> [   1.0000420] sunxidebe0 at simplebus1: Display Engine Backend 
> (display-backend@1e60000)
> [   1.0000420] sunxidebe1 at simplebus1: Display Engine Backend 
> (display-backend@1e40000)
>
> So in summary I seem to get up to video initialization. For my 4K TV I had to 
> increase the MAX_FB reserved memory to 32M but that didn't help, also not 
> connecting any HDMI device didn't help.
>
> The u-boot bootm command was change to manage ramdisk images thus the tips on 
> our web site don't apply to the new bootm syntax.
>
> Any other things I can try or that I overlooked?
>
> Frank