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FriendlyARM Mini2440 Port announcement


I have been working on a Mini2440 port for a while now, and I am happy
to announce that the initial code for the port is now a part of
The FriendlyARM Mini2440[1] is an evaluation board based on the
Samsung S3C2440 ARM SoC. It comes with a DM9000 Ethernet chip and an
UDA1341 audio DAC, on-board NAND and NOR flash, a SD-card slot, and
optionally a 3.5" or 7" touch display.

dmesg output:

Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
   2006, 2007, 2008, 2009, 2010, 2011, 2012
   The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
   The Regents of the University of California.  All rights reserved.

NetBSD 5.99.64 (MINI2440) #22: Mon Feb  6 21:29:36 CET 2012
total memory = 65536 KB
avail memory = 60176 KB
mainbus0 (root)
cpu0 at mainbus0: ARM920T rev 0 (ARM9TDMI core)
cpu0: DC enabled IC enabled WB enabled EABT
cpu0: 16KB/32B 64-way Instruction cache
cpu0: 16KB/32B 64-way write-back-locking-A Data cache
ssio0 at mainbus0: fclk 405 MHz hclk 101 MHz pclk 50 MHz
ohci0 at ssio0 intr 26
ohci0: OHCI version 1.0
usb0 at ohci0: USB revision 1.0
sscom0 at ssisscom0: console (major=104)
ssextio0 at ssio0
dme0 at ssextio0 addr 0x20000300 intr 7
lcd0 at ssio0
wsdisplay0 at lcd0
lcd0: Allocating LCD frame buffer of size 153600
sssdi0 at ssio0
sdmmc0 at sssdi0
ssiis0 at ssio0
udassio0 at ssiis0
audio0 at udassio0: half duplex, playback, capture
sstouch0 at ssio0
wsmouse0 at sstouch0 mux 0
ssrtc0 at ssio0: RTC
clock: hz=100 stathz = 64 PCLK=50625000 prescaler=2 tc=24719
uhub0 at usb0: Samsung OHCI root hub, class 9/0, rev 1.00/1.00, addr 1
ld0 at sdmmc0: <     >
ld0: 1962 MB, 996 cyl, 64 head, 63 sec, 512 bytes/sect x 4019200 sectors
ld0: 4-bit width, bus clock 25.000 MHz
boot device: ld0
root on ld0a dumps on ld0b
root file system type: ffs


Best regards,

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