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machfb, chipsfb, viaide, pciide, ral, hme testers wanted
If you have one of the devices whose drivers is mentioned on the subject
line, and it requires a "hack" (or if you don't know if it requires a
hack) where NetBSD enables PCI memory and/or I/O access to the device,
then please test the attached patch and let me know how it works for
you. Thanks.
Dave
--
David Young OJC Technologies
dyoung%ojctech.com@localhost Urbana, IL * (217) 344-0444 x24
Index: sys/dev/pci/if_hme_pci.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/if_hme_pci.c,v
retrieving revision 1.35
diff -u -p -r1.35 if_hme_pci.c
--- sys/dev/pci/if_hme_pci.c 23 Mar 2010 21:54:23 -0000 1.35
+++ sys/dev/pci/if_hme_pci.c 8 Apr 2011 14:43:48 -0000
@@ -155,12 +155,10 @@ hmeattach_pci(device_t parent, device_t
*/
switch (type) {
case PCI_MAPREG_TYPE_MEM:
- pa->pa_flags |= PCI_FLAGS_MEM_ENABLED;
csr |= PCI_COMMAND_MEM_ENABLE;
sc->sc_bustag = pa->pa_memt;
break;
case PCI_MAPREG_TYPE_IO:
- pa->pa_flags |= PCI_FLAGS_IO_ENABLED;
csr |= PCI_COMMAND_IO_ENABLE;
sc->sc_bustag = pa->pa_iot;
break;
Index: sys/dev/pci/if_ral_pci.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/if_ral_pci.c,v
retrieving revision 1.15
diff -u -p -r1.15 if_ral_pci.c
--- sys/dev/pci/if_ral_pci.c 19 Jan 2010 22:07:01 -0000 1.15
+++ sys/dev/pci/if_ral_pci.c 8 Apr 2011 14:43:48 -0000
@@ -144,7 +147,6 @@ ral_pci_attach(device_t parent, device_t
reg = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
reg |= PCI_COMMAND_MASTER_ENABLE | PCI_COMMAND_MEM_ENABLE;
pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg);
- pa->pa_flags |= PCI_FLAGS_MEM_ENABLED;
/* map control/status registers */
error = pci_mapreg_map(pa, RAL_PCI_BAR0, PCI_MAPREG_TYPE_MEM |
Index: sys/dev/pci/machfb.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/machfb.c,v
retrieving revision 1.63
diff -u -p -r1.63 machfb.c
--- sys/dev/pci/machfb.c 22 Jan 2011 15:14:28 -0000 1.63
+++ sys/dev/pci/machfb.c 8 Apr 2011 14:43:48 -0000
@@ -513,6 +517,7 @@ mach64_attach(device_t parent, device_t
int setmode, width, height;
pcireg_t screg;
uint32_t reg;
+ const pcireg_t enables = PCI_COMMAND_MEM_ENABLE|PCI_COMMAND_IO_ENABLE;
sc->sc_dev = self;
sc->sc_pc = pa->pa_pc;
@@ -535,9 +540,8 @@ mach64_attach(device_t parent, device_t
/* enable memory and disable IO access */
screg = pci_conf_read(sc->sc_pc, sc->sc_pcitag, PCI_COMMAND_STATUS_REG);
- if ((screg & PCI_FLAGS_MEM_ENABLED) == 0) {
- screg |= PCI_FLAGS_IO_ENABLED;
- screg |= PCI_FLAGS_MEM_ENABLED;
+ if ((screg & enables) != enables) {
+ screg |= enables;
pci_conf_write(sc->sc_pc, sc->sc_pcitag,
PCI_COMMAND_STATUS_REG, screg);
}
Index: sys/dev/pci/pci.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/pci.c,v
retrieving revision 1.138
diff -u -p -r1.138 pci.c
--- sys/dev/pci/pci.c 5 Apr 2011 23:10:52 -0000 1.138
+++ sys/dev/pci/pci.c 8 Apr 2011 15:03:50 -0000
@@ -370,10 +370,6 @@ pci_probe_device(struct pci_softc *sc, p
* as appropriate.
*/
pa.pa_flags = sc->sc_flags;
- if ((csr & PCI_COMMAND_IO_ENABLE) == 0)
- pa.pa_flags &= ~PCI_FLAGS_IO_ENABLED;
- if ((csr & PCI_COMMAND_MEM_ENABLE) == 0)
- pa.pa_flags &= ~PCI_FLAGS_MEM_ENABLED;
/*
* If the cache line size is not configured, then
Index: sys/dev/pci/pciide_common.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/pciide_common.c,v
retrieving revision 1.49
diff -u -p -r1.49 pciide_common.c
--- sys/dev/pci/pciide_common.c 4 Apr 2011 20:37:56 -0000 1.49
+++ sys/dev/pci/pciide_common.c 8 Apr 2011 14:43:48 -0000
@@ -266,13 +266,15 @@ pciide_chipen(struct pciide_softc *sc, c
{
pcireg_t csr;
- if ((pa->pa_flags & PCI_FLAGS_IO_ENABLED) == 0) {
- csr = pci_conf_read(sc->sc_pc, sc->sc_tag,
- PCI_COMMAND_STATUS_REG);
+ if ((pa->pa_flags & PCI_FLAGS_IO_ENABLED) == 0) {
+ aprint_normal_dev(sc->sc_wdcdev.sc_atac.atac_dev,
+ "I/O access disabled at bridge\n");
+ return 0;
+ }
+ csr = pci_conf_read(sc->sc_pc, sc->sc_tag, PCI_COMMAND_STATUS_REG);
+ if ((csr & PCI_COMMAND_IO_ENABLE) == 0) {
aprint_normal_dev(sc->sc_wdcdev.sc_atac.atac_dev,
- "device disabled (at %s)\n",
- (csr & PCI_COMMAND_IO_ENABLE) == 0 ?
- "device" : "bridge");
+ "I/O access disabled at device\n");
return 0;
}
return 1;
Index: sys/dev/pci/viaide.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/viaide.c,v
retrieving revision 1.72
diff -u -p -r1.72 viaide.c
--- sys/dev/pci/viaide.c 4 Apr 2011 20:37:56 -0000 1.72
+++ sys/dev/pci/viaide.c 8 Apr 2011 14:43:49 -0000
@@ -837,6 +837,7 @@ pio: /* setup PIO mode */
static int
via_sata_chip_map_common(struct pciide_softc *sc, struct pci_attach_args *pa)
{
+ pcireg_t csr;
int maptype, ret;
if (pciide_chipen(sc, pa) == 0)
@@ -877,12 +878,11 @@ via_sata_chip_map_common(struct pciide_s
/*
* Enable memory-space access if it isn't already there.
*/
- if ((pa->pa_flags & PCI_FLAGS_MEM_ENABLED) == 0) {
- pcireg_t csr;
+ csr = pci_conf_read(pa->pa_pc, pa->pa_tag,
+ PCI_COMMAND_STATUS_REG);
+ if ((csr & PCI_COMMAND_MEM_ENABLE) == 0 &&
+ (pa->pa_flags & PCI_FLAGS_MEM_ENABLED) != 0) {
- pa->pa_flags |= PCI_FLAGS_MEM_ENABLED;
- csr = pci_conf_read(pa->pa_pc, pa->pa_tag,
- PCI_COMMAND_STATUS_REG);
pci_conf_write(pa->pa_pc, pa->pa_tag,
PCI_COMMAND_STATUS_REG,
csr | PCI_COMMAND_MEM_ENABLE);
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