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Re: CardBus testers needed
>>>>> "David" == David Young <dyoung%pobox.com@localhost> writes:
>> I don't know if it's the appropriate time to speak up for my
>> (still existing) PR #40069 (CB1410 CardBus Controller problem)
>>
>> http://www.netbsd.org/cgi-bin/query-pr-single.pl?number=40069
David> Please send 'pcictl pci0 dump -d 20 -f 4'.
Attached:
PCI configuration registers:
Common header:
0x00: 0x43841002 0x02a00107 0x06040100 0x00814000
Vendor Name: ATI Technologies (0x1002)
Device Name: SB600 PCI to PCI Bridge (0x4384)
Command register: 0x0107
I/O space accesses: on
Memory space accesses: on
Bus mastering: on
Special cycles: off
MWI transactions: off
Palette snooping: off
Parity error checking: off
Address/data stepping: off
System error (SERR): on
Fast back-to-back transactions: off
Interrupt disable: off
Status register: 0x02a0
Capability List support: off
66 MHz capable: on
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Slave signaled Target Abort: off
Master received Target Abort: off
Master received Master Abort: off
Asserted System Error (SERR): off
Parity error detected: off
Class Name: bridge (0x06)
Subclass Name: PCI (0x04)
Interface: 0x01
Revision ID: 0x00
BIST: 0x00
Header Type: 0x01+multifunction (0x81)
Latency Timer: 0x40
Cache Line Size: 0x00
Type 1 (PCI-PCI bridge) header:
0x10: 0x00000000 0x00000000 0x40040300 0x6280e0c0
0x20: 0xfeb0fe30 0xfcf0fb00 0x00000000 0x00000000
0x30: 0x00000000 0x00000000 0x00000000 0x00030000
Base address register at 0x10
not implemented(?)
Base address register at 0x14
not implemented(?)
Primary bus number: 0x00
Secondary bus number: 0x03
Subordinate bus number: 0x04
Secondary bus latency timer: 0x40
Secondary status register: 0x6280
66 MHz capable: off
User Definable Features (UDF) support: off
Fast back-to-back capable: on
Data parity error detected: off
DEVSEL timing: medium (0x1)
Signalled target abort: off
Received target abort: off
Received master abort: on
Received system error: on
Detected parity error: off
I/O region:
base register: 0xc0
limit register: 0xe0
base upper 16 bits register: 0x0000
limit upper 16 bits register: 0x0000
Memory region:
base register: 0xfe30
limit register: 0xfeb0
Prefetchable memory region:
base register: 0xfb00
limit register: 0xfcf0
base upper 32 bits register: 0x00000000
limit upper 32 bits register: 0x00000000
Reserved @ 0x34: 0x00000000
Expansion ROM Base Address: 0x00000000
Interrupt line: 0x00
Interrupt pin: 0x00 (none)
Bridge control register: 0x0003
Parity error response: on
Secondary SERR forwarding: on
ISA enable: off
VGA enable: off
Master abort reporting: off
Secondary bus reset: off
Fast back-to-back capable: off
Device-dependent header:
0x40: 0xff3c0026 0x00000000 0xd13f0f0c 0x00000100
0x50: 0x00000001 0xa8030008 0x00000000 0xffff0085
0x60: 0x00170eca 0x0010d8ba 0x00000000 0x00000000
0x70: 0x00000000 0x00000000 0x00000000 0x00000000
0x80: 0x00000000 0x00000000 0x00000000 0x00000000
0x90: 0x00000000 0x00000000 0x00000000 0x00000000
0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
0xc0: 0x00000000 0x00000000 0x00000000 0x00000000
0xd0: 0x00000000 0x00000000 0x00000000 0x06020001
0xe0: 0x00800000 0x00000000 0x00000000 0x00000000
0xf0: 0x00000000 0x00000000 0x00000000 0x00000000
David> Have you tried PCI_ADDR_FIXUP, PCI_BUS_FIXUP, or
David> PCI_INTR_FIXUP?
I've (re)tested each option separately and all set at once:
I cannot see/produce any dmesg difference within the cardbus/pcmcia
messages and still no card detection.
Anything else to test/provide?
Markus.
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