Re: databases bombing

[David Brownlee <abs%NetBSD.org@localhost>]

        Thanks for catching this - Intel appear to have re-used cpu
        branding strings between Northwood and Prescott pentium4s.
        Which is just... special and annoying.

        cpuflags now handles this by explicitly testing for SSE3 support
        to distinguish between '-march=prescott' and '-march=pentium4'
        fixed in v1.32 and apologies for the pain...



On Tue, 6 Jan 2009, John Nemeth wrote:

> On May 29,  1:39pm, Daniel Carosone wrote:
> } On Mon, Jan 05, 2009 at 10:29:52PM -0800, John Nemeth wrote:
> } >      I am trying to run MySQL 5 on it, but it fails initialisation.  I
> } > also tried PostgreSQL last week and it failed in a similar way, so I
> } > don't think the problem is with MySQL.  mysqld only links against
> } > system libraries so that rules out other packages as being the
> } > problem...
> }
> } Wrong cpuflags, in particular related to fp ?
>
>     Thanks!  That was it.  Guess it was a pkgsrc issue of sorts.  I
> use devel/cpuflags which currently reports:
>
> -----
>
> P4-3679GHz: {67} cpuflags
> -mfpmath=sse -msse2 -march=prescott
>
> -----
>
> It used to say "-mfpmath=sse -msse2 -march=pentium4".  My CPU is:
>
> -----
>
> P4-3679GHz: {69} cpuctl identify 0
> cpu0: Intel Pentium 4 (686-class), 3519.84 MHz, id 0xf29
> cpu0: features 0xbfebfbff<FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR>
> cpu0: features 0xbfebfbff<PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX>
> cpu0: features 0xbfebfbff<FXSR,SSE,SSE2,SS,HTT,TM,SBF>
> cpu0: features2 0x4400<CID,xTPR>
> cpu0: "Intel(R) Pentium(R) 4 CPU 3.20GHz"
> cpu0: I-cache 12K uOp cache 8-way, D-cache 8KB 64B/line 4-way
> cpu0: L2 cache 1MB 64B/line 8-way
> cpu0: ITLB 4K/4M: 64 entries
> cpu0: DTLB 4K/4M: 64 entries
> cpu0: Initial APIC ID 0
> cpu0: Cluster/Package ID 0
> cpu0: SMT ID 0
> cpu0: family 0f model 02 extfamily 00 extmodel 00
>
> -----
>
>     I don't know the code names well enough to know if this qualifies
> as prescott or not (it is a hyperthreading CPU).  Given what the GCC
> manpage says and lack of SSE3 in the above, I'm guessing it doesn't.
>
> -----
>
>           prescott
>               Improved version of Intel Pentium4 CPU with MMX, SSE, SSE2 and
>               SSE3 instruction set support.
>
> -----
>
>     I changed it back to -march=pentium4 and retested.  It worked.
>
> }-- End of excerpt from Daniel Carosone

--
                David/absolute       -- www.NetBSD.org: No hype required --