msk(4) require to sync status buffer

[KIYOHARA Takashi <kiyohara%kk.iij4u.or.jp@localhost>]

Hi! all,


I think that the processing of the status buffer of msk(4) is strange.
It doesn't do at interrupt handling at all though it does pre-read-sync
only first.  I think that this cannot read a correct value with like CPU
of writeback cache (not PC/AT).

Prease fix.

Thanks
--
kiyohara

Index: if_msk.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/if_msk.c,v
retrieving revision 1.15
diff -u -r1.15 if_msk.c
--- if_msk.c    19 Jan 2008 22:10:18 -0000      1.15
+++ if_msk.c    22 Feb 2008 12:52:24 -0000
@@ -1877,6 +1877,8 @@
                    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE);
                cur_st = &sc->sk_status_ring[sc->sk_status_idx];
        }
+       /* Invalidate the status buffer that has already been cached */
+       MSK_CDSTSYNC(sc, sc->sk_status_idx, BUS_DMASYNC_PREREAD);
 
        if (status & SK_Y2_IMR_BMU) {
                CSR_WRITE_4(sc, SK_STAT_BMU_CSR, SK_STAT_BMU_IRQ_CLEAR);