Re: rust and rust-bin confusion

[Taylor R Campbell <riastradh%NetBSD.org@localhost>]

> Date: Sun, 11 May 2025 07:08:20 -0000 (UTC)
> From: mlelstv%serpens.de@localhost (Michael van Elst)
> 
> rokuyama.rk%gmail.com@localhost (Rin Okuyama) writes:
> 
> >Here, `mcr ...` is armv6 variant of `dmb`, which is dropped for
> >armv8, and emulated by illegal insn handler; reservation made by
> >`strex` is lost and `strex` always fails unconditionally.

The code you quoted in std::sys::pal::unix::os::getenv::{{closure}} is
a very weird thing to do.

Normally you would do

	release barriers
1:	ldrex
	arithmetic
	strex
	branch if failed to 1b
	acquire or dekker barriers

Where is this code coming from that inserts a barrier _between_ the
ldrex and strex?  That's a recipe for failure.  Does llvm generate
that?  Is it coming from the Rust compiler, or compiler-rt?  Or is it
inline asm in this Rust module?

> Do you see any specific place where the reservation is lost or
> is this just due to the amount of code being executed in the
> illegal instruction handler ?

ERET clears the reservation.  See, e.g., armv8 ARM (Arm DDI 0487F.b,
ID040120, 2020), J1.1.4 aarch64/Instrs, p. J1-7598, in the definition
of aarch64/instrs/branch/eret/AArch64.ExceptionReturn:

AArch64.ExceptionReturn(bits(64) new_pc_in, bits64(spsr))
	...
	ClearExclusiveLocal(ProcessorID());
	...

So there is no way for this to work on aarch64: ERET is guaranteed to
clear the reservation after we emulate the armv6 DMB-alike.