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Re: Remove plip(4)?
On Mon, 21 Nov 2022 16:23:49 -0500 (EST), Mouse wrote:
>
>> SLCTIN 17 - 17
>
> This looks dubious to me.
>
> Connecting pins 2/3/4/5/6 to pins 10/11/12/13/15, that looks sensible.
> Those are output pins on one end and input pins on the other.
>
> Pins 14, 16, and 17, though, are output pins, meaning that connecting
> those between the ends risks the two ends arguing over its logic level,
> possibly frying an output driver if there's too little resistance
> between the drivers.
>
> It's possible this worry is unwarranted. It's possible pins 14/15/17
> can, on some parallel ports, be switched to inputs. Unlike serial
> ports[%], I don't know whether there's an electrical spec for those
> drivers, nor if so what it is. But I'd be concerned enough to leave
> those pints out, or at least put, say, 100 ohms in line with them, and
> I'd treat your unidirectional communication as a debugging problem,
> since it sounds as though the cable you have _should_ work.
>
> [%] Serial ports are really nice in this regard. I once got hold of a
> copy of EIA-RS232-C. It specifies something like "any pin or
> combination of pins may be shorted indefinitely to any voltage source
> within range [which for RS232 means, I think, -25V to +25V] indefinitely
> without damage". Of course, it also specifies other things which get
> ignored (I've heard of "serial ports" that drive 0V and 5V instead of
> the correct voltages)....
>
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The pin 17 connection also seem odd to me after reading more about it. I
did find this related info, that touches on what you mentioned:
"The data output of the Parallel Port is normally TTL logic levels. Most
Parallel Ports implemented in ASIC, can sink and source around 12mA.
However, there are other variations possible: Sink/Source 6mA, Source
12mA/Sink 20mA, Sink 16mA/Source 4mA, Sink/Source 12mA and others."
and it does seem that in the extended modes (EPP/ECP) the functionality
of some pins are changed:
https://pinoutguide.com/ParallelPorts/ParallelECP_pinout.shtml
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