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Re: Strange Netgear GA620T


> On May 7, 2020, at 7:12 PM, SAITOH Masanobu <> wrote:
> The following output of pcictl is form my GA620T Rev. A.
> If it has big difference between mine and yours, your card
> might be broken (because of broken ROM image or the data bus
> is unstable).

I picked up an IBM-branded flavor of this device which seems to work correctly:

cobalt# pcictl pci0 dump -d 10
PCI configuration registers:
  Common header:
    0x00: 0x000212ae 0x82a00306 0x02000001 0x0000f808

    Vendor Name: Alteon (0x12ae)
    Device Name: ACEnic 1000baseT Ethernet (0x0002)
    Command register: 0x0306
      I/O space accesses: off
      Memory space accesses: on
      Bus mastering: on
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): on
      Fast back-to-back transactions: on
      Interrupt disable: off
    Status register: 0x82a0
      Immediate Readiness: off
      Interrupt status: inactive
      Capability List support: off
      66 MHz capable: on
      User Definable Features (UDF) support: off
      Fast back-to-back capable: on
      Data parity error detected: off
      DEVSEL timing: medium (0x1)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: on
    Class Name: network (0x02)
    Subclass Name: ethernet (0x00)
    Interface: 0x00
    Revision ID: 0x01
    BIST: 0x00
    Header Type: 0x00 (0x00)
    Latency Timer: 0xf8
    Cache Line Size: 32bytes (0x08)

  Type 0 ("normal" device) header:
    0x10: 0x12080000 0x00000000 0x00000000 0x00000000
    0x20: 0x00000000 0x00000000 0x00000000 0x000212ae
    0x30: 0x00000000 0x00000000 0x00000000 0x00400109

    Base address register at 0x10
      type: 32-bit nonprefetchable memory
      base: 0x12080000
    Base address register at 0x14
      not implemented
    Base address register at 0x18
      not implemented
    Base address register at 0x1c
      not implemented
    Base address register at 0x20
      not implemented
    Base address register at 0x24
      not implemented
    Cardbus CIS Pointer: 0x00000000
    Subsystem vendor ID: 0x12ae
    Subsystem ID: 0x0002
    Expansion ROM Base Address Register: 0x00000000
      base: 0x00000000
      Expansion ROM Enable: off
      Validation Status: Validation not supported
      Validation Details: 0x0
    Reserved @ 0x34: 0x00000000
    Reserved @ 0x38: 0x00000000
    Maximum Latency: 0x00
    Minimum Grant: 0x40
    Interrupt pin: 0x01 (pin A)
    Interrupt line: 0x09

  Device-dependent header:
    0x40: 0x60000020 0x00c03260 0x00000000 0x00000000
    0x50: 0x00103455 0xba4f808c 0xd6ddeefa 0x7612ff00
    0x60: 0x99666b89 0xdbae3ff3 0x000ff800 0x00000000
    0x70: 0xb9c7639a 0xdbae3ff3 0x1fd7fb7b 0x000000f5
    0x80: 0xeffffdaf 0xfffdfff7 0xeffffdaf 0xfffdfff7
    0x90: 0xffffdffb 0xefffc007 0x0001ffe0 0x0001ffe0
    0xa0: 0x00000080 0x006b45e9 0x00005fbf 0x0000aff8
    0xb0: 0x0001f080 0x007a7bfe 0x00003fd7 0x007a7bfe
    0xc0: 0x001d5000 0x00166fc0 0x001bfe58 0x001d7ff8
    0xd0: 0x00110000 0x000572a0 0x001d7ba8 0x00000000
    0xe0: 0x0010e000 0x0010e000 0x0010e000 0xffffff00
    0xf0: 0x0010d800 0x0010d800 0x0010d800 0x0010d800

I guess I will recycle the other one that's busted.

-- thorpej

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