Re: biowait for seconds

[Emmanuel Dreyfus <manu%netbsd.org@localhost>]

On Wed, Apr 30, 2025 at 04:48:10PM +0000, Emmanuel Dreyfus wrote:
>   PCI Message Signaled Interrupt
>     Message Control register: 0x0100
>       MSI Enabled: off
> 
> Hence the question is now how to enable MSI?

MSI is not enabled because the kernel did not found a host
bridge that support MSI. To be precise, it did not found a
host bridge.

Code in sys/arch/x86/pci/pci_machdep.c looks for the host
bridge at bus 0, device 0, function 0 to 6. On this machine,
the host bridge is at bus 0, device 20, function 4.

$ pcictl pci0 list|grep 'host bridge'
000:20:4: Intel product 1bfe (host bridge, revision 0x11)
254:00:3: Intel Snow Ridge IEH (host bridge)

The patch below fixes everything. ALl PCI devices now use MSI or
MSIX instead of ioapic, the nvme I/O do not lag in biowait 
anymore. The machine boots at normal pace.

How should this be properly handled? Should we iterate 
on all buses, devices and functions? Or keep it as a
special case like I did? 

And I wondder what 254:0:1 is.

--- sys/arch/x86/pci/pci_machdep.c.orig
+++ sys/arch/x86/pci/pci_machdep.c
@@ -519,8 +519,21 @@
                        havehb = true;
                        break;
                }
        }
+
+       /* Intel Snow Ridge */
+       if (havehb == false) {
+               tag = pci_make_tag(pc, 0, 20, 4);
+               id = pci_conf_read(pc, tag, PCI_ID_REG);
+               class = pci_conf_read(pc, tag, PCI_CLASS_REG);
+
+               if (PCI_CLASS(class) == PCI_CLASS_BRIDGE &&
+                   PCI_SUBCLASS(class) == PCI_SUBCLASS_BRIDGE_HOST) {
+                       havehb = true;
+               }
+       }
+
        if (havehb == false)
                return;
 
        /* VMware and KVM use old chipset, but they can use MSI/MSI-X */


-- 
Emmanuel Dreyfus
manu%netbsd.org@localhost