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[src/netbsd-7]: src/sys/arch Catch up to -current as of ~1 hour ago for sys/a...
details: https://anonhg.NetBSD.org/src/rev/ca997957b90e
branches: netbsd-7
changeset: 798514:ca997957b90e
user: martin <martin%NetBSD.org@localhost>
date: Sun Nov 09 14:42:33 2014 +0000
description:
Catch up to -current as of ~1 hour ago for sys/arch/arm/allwinner and
sys/arch/evbarm/awin. Requested by skrll in ticket #203.
diffstat:
sys/arch/arm/allwinner/awin_ac.c | 1299 +++++++++++++++++++++++++++++++++
sys/arch/arm/allwinner/awin_board.c | 195 ++++-
sys/arch/arm/allwinner/awin_cnt.c | 136 +++
sys/arch/arm/allwinner/awin_com.c | 28 +-
sys/arch/arm/allwinner/awin_dma.c | 176 ++++
sys/arch/arm/allwinner/awin_dma.h | 85 ++
sys/arch/arm/allwinner/awin_dma_a10.c | 333 ++++++++
sys/arch/arm/allwinner/awin_dma_a31.c | 333 ++++++++
sys/arch/arm/allwinner/awin_eth.c | 9 +-
sys/arch/arm/allwinner/awin_gige.c | 138 +++-
sys/arch/arm/allwinner/awin_gpio.c | 122 ++-
sys/arch/arm/allwinner/awin_hdmi.c | 531 +++++++++++++
sys/arch/arm/allwinner/awin_intr.h | 33 +-
sys/arch/arm/allwinner/awin_io.c | 89 +-
sys/arch/arm/allwinner/awin_ir.c | 314 +++++++
sys/arch/arm/allwinner/awin_mmc.c | 527 ++++++++++--
sys/arch/arm/allwinner/awin_otg.c | 269 ++++++
sys/arch/arm/allwinner/awin_otgreg.h | 294 +++++++
sys/arch/arm/allwinner/awin_p2wi.c | 251 ++++++
sys/arch/arm/allwinner/awin_reg.h | 876 ++++++++++++++++++++++-
sys/arch/arm/allwinner/awin_rtc.c | 188 ++++
sys/arch/arm/allwinner/awin_twi.c | 25 +-
sys/arch/arm/allwinner/awin_usb.c | 141 ++-
sys/arch/arm/allwinner/awin_var.h | 23 +-
sys/arch/arm/allwinner/awin_wdt.c | 18 +-
sys/arch/arm/allwinner/files.awin | 46 +-
sys/arch/evbarm/awin/awin_machdep.c | 177 +++-
sys/arch/evbarm/awin/awin_start.S | 193 ++++-
sys/arch/evbarm/awin/awin_sysconfig.c | 197 +++++
sys/arch/evbarm/awin/awin_sysconfig.h | 38 +
30 files changed, 6823 insertions(+), 261 deletions(-)
diffs (truncated from 8395 to 300 lines):
diff -r 2ffb22b31958 -r ca997957b90e sys/arch/arm/allwinner/awin_ac.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/allwinner/awin_ac.c Sun Nov 09 14:42:33 2014 +0000
@@ -0,0 +1,1299 @@
+/* $NetBSD: awin_ac.c,v 1.16.2.2 2014/11/09 14:42:33 martin Exp $ */
+
+/*-
+ * Copyright (c) 2014 Jared D. McNeill <jmcneill%invisible.ca@localhost>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include "locators.h"
+#include "opt_ddb.h"
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: awin_ac.c,v 1.16.2.2 2014/11/09 14:42:33 martin Exp $");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/device.h>
+#include <sys/intr.h>
+#include <sys/systm.h>
+#include <sys/kmem.h>
+
+#include <sys/audioio.h>
+#include <dev/audio_if.h>
+#include <dev/auconv.h>
+
+#include <arm/allwinner/awin_reg.h>
+#include <arm/allwinner/awin_var.h>
+
+#define AWINAC_TX_TRIG_LEVEL 0xf
+#define AWINAC_RX_TRIG_LEVEL 0x7
+#define AWINAC_DRQ_CLR_CNT 0x3
+#define AWINAC_INIT_VOL 0x3b
+
+enum {
+ REGMAP_A10 = 0,
+ REGMAP_A31,
+};
+
+enum {
+ AC_DAC_DPC = 0,
+ AC_DAC_FIFOC,
+ AC_DAC_FIFOS,
+ AC_DAC_TXDATA,
+ AC_DAC_ACTL,
+ AC_ADC_FIFOC,
+ AC_ADC_FIFOS,
+ AC_ADC_RXDATA,
+ AC_ADC_ACTL,
+ AC_DAC_CNT,
+ AC_ADC_CNT,
+ AC_OM_DACA_CTRL,
+ AC_OM_ADCA_CTRL,
+ AC_OM_PA_CTRL,
+ AC_MIC_CTRL,
+ _AC_NREGS
+};
+
+static const uint8_t awinac_regmap[2][_AC_NREGS] = {
+ [REGMAP_A10] = {
+ [AC_DAC_DPC] = 0x00,
+ [AC_DAC_FIFOC] = 0x04,
+ [AC_DAC_FIFOS] = 0x08,
+ [AC_DAC_TXDATA] = 0x0c,
+ [AC_DAC_ACTL] = 0x10,
+ [AC_ADC_FIFOC] = 0x1c,
+ [AC_ADC_FIFOS] = 0x20,
+ [AC_ADC_RXDATA] = 0x24,
+ [AC_ADC_ACTL] = 0x28,
+ [AC_DAC_CNT] = 0x30,
+ [AC_ADC_CNT] = 0x34,
+ },
+ [REGMAP_A31] = {
+ [AC_DAC_DPC] = 0x00,
+ [AC_DAC_FIFOC] = 0x04,
+ [AC_DAC_FIFOS] = 0x08,
+ [AC_DAC_TXDATA] = 0x0c,
+ [AC_ADC_FIFOC] = 0x10,
+ [AC_ADC_FIFOS] = 0x14,
+ [AC_ADC_RXDATA] = 0x18,
+ [AC_DAC_CNT] = 0x40,
+ [AC_ADC_CNT] = 0x44,
+ [AC_OM_DACA_CTRL] = 0x20,
+ [AC_OM_ADCA_CTRL] = 0x2c,
+ [AC_OM_PA_CTRL] = 0x24,
+ [AC_MIC_CTRL] = 0x28,
+ },
+};
+
+/* DAC_DPC */
+#define DAC_DPC_EN_DA __BIT(31)
+#define DAC_DPC_MODQU __BITS(28,25)
+#define DAC_DPC_DWA __BIT(24)
+#define DAC_DPC_HPF_EN __BIT(18)
+#define DAC_DPC_DVOL __BITS(17,12)
+/* DAC_FIFOC */
+#define DAC_FIFOC_FS __BITS(31,29)
+#define DAC_FS_48KHZ 0
+#define DAC_FS_32KHZ 1
+#define DAC_FS_24KHZ 2
+#define DAC_FS_16KHZ 3
+#define DAC_FS_12KHZ 4
+#define DAC_FS_8KHZ 5
+#define DAC_FS_192KHZ 6
+#define DAC_FS_96KHZ 7
+#define DAC_FIFOC_FIR_VER __BIT(28)
+#define DAC_FIFOC_SEND_LASAT __BIT(26)
+#define DAC_FIFOC_FIFO_MODE __BITS(25,24)
+#define FIFO_MODE_24_31_8 0
+#define FIFO_MODE_16_31_16 0
+#define FIFO_MODE_16_15_0 1
+#define DAC_FIFOC_DRQ_CLR_CNT __BITS(22,21)
+#define DAC_FIFOC_TX_TRIG_LEVEL __BITS(14,8)
+#define DAC_FIFOC_ADDA_LOOP_EN __BIT(7)
+#define DAC_FIFOC_MONO_EN __BIT(6)
+#define DAC_FIFOC_TX_SAMPLE_BITS __BIT(5)
+#define DAC_FIFOC_DRQ_EN __BIT(4)
+#define DAC_FIFOC_IRQ_EN __BIT(3)
+#define DAC_FIFOC_FIFO_UNDERRUN_IRQ_EN __BIT(2)
+#define DAC_FIFOC_FIFO_OVERRUN_IRQ_EN __BIT(1)
+#define DAC_FIFOC_FIFO_FLUSH __BIT(0)
+/* DAC_FIFOS */
+#define DAC_FIFOS_TX_EMPTY __BIT(23)
+#define DAC_FIFOS_TXE_CNT __BITS(22,8)
+#define DAC_FIFOS_TXE_INT __BIT(3)
+#define DAC_FIFOS_TXU_INT __BIT(2)
+#define DAC_FIFOS_TXO_INT __BIT(1)
+#define DAC_FIFOS_INT_MASK __BITS(3,1)
+/* DAC_ACTL */
+#define DAC_ACTL_DACAREN __BIT(31)
+#define DAC_ACTL_DACALEN __BIT(30)
+#define DAC_ACTL_MIXEN __BIT(29)
+#define DAC_ACTL_LNG __BIT(26)
+#define DAC_ACTL_FMG __BITS(25,23)
+#define DAC_ACTL_MICG __BITS(22,20)
+#define DAC_ACTL_LLNS __BIT(19)
+#define DAC_ACTL_RLNS __BIT(18)
+#define DAC_ACTL_LFMS __BIT(17)
+#define DAC_ACTL_RFMS __BIT(16)
+#define DAC_ACTL_LDACLMIXS __BIT(15)
+#define DAC_ACTL_RDACRMIXS __BIT(14)
+#define DAC_ACTL_LDACRMIXS __BIT(13)
+#define DAC_ACTL_MIC1LS __BIT(12)
+#define DAC_ACTL_MIC1RS __BIT(11)
+#define DAC_ACTL_MIC2LS __BIT(10)
+#define DAC_ACTL_MIC2RS __BIT(9)
+#define DAC_ACTL_DACPAS __BIT(8)
+#define DAC_ACTL_MIXPAS __BIT(7)
+#define DAC_ACTL_PAMUTE __BIT(6)
+#define DAC_ACTL_PAVOL __BITS(5,0)
+/* OM_DACA_CTRL */
+#define OM_DACA_CTRL_DACAREN __BIT(31)
+#define OM_DACA_CTRL_DACALEN __BIT(30)
+#define OM_DACA_CTRL_RMIXEN __BIT(29)
+#define OM_DACA_CTRL_LMIXEN __BIT(28)
+#define OM_DACA_CTRL_RMIXMUTE __BITS(23,17)
+#define OM_DACA_CTRL_RMIXMUTE_DACL __BIT(0)
+#define OM_DACA_CTRL_RMIXMUTE_DACR __BIT(1)
+#define OM_DACA_CTRL_RMIXMUTE_LINEINR __BIT(2)
+#define OM_DACA_CTRL_RMIXMUTE_PHONEP __BIT(3)
+#define OM_DACA_CTRL_RMIXMUTE_PHONEP_PHONEN __BIT(4)
+#define OM_DACA_CTRL_RMIXMUTE_MIC2_BOOST __BIT(5)
+#define OM_DACA_CTRL_RMIXMUTE_MIC1_BOOST __BIT(6)
+#define OM_DACA_CTRL_LMIXMUTE __BITS(16,10)
+#define OM_DACA_CTRL_LMIXMUTE_DACR __BIT(0)
+#define OM_DACA_CTRL_LMIXMUTE_DACL __BIT(1)
+#define OM_DACA_CTRL_LMIXMUTE_LINEINL __BIT(2)
+#define OM_DACA_CTRL_LMIXMUTE_PHONEN __BIT(3)
+#define OM_DACA_CTRL_LMIXMUTE_PHONEP_PHONEN __BIT(4)
+#define OM_DACA_CTRL_LMIXMUTE_MIC2_BOOST __BIT(5)
+#define OM_DACA_CTRL_LMIXMUTE_MIC1_BOOST __BIT(6)
+#define OM_DACA_CTRL_RHPIS __BIT(9)
+#define OM_DACA_CTRL_LHPIS __BIT(8)
+#define OM_DACA_CTRL_RHPPAMUTE __BIT(7)
+#define OM_DACA_CTRL_LHPPAMUTE __BIT(6)
+#define OM_DACA_CTRL_HPVOL __BITS(5,0)
+/* ADC_FIFOC */
+#define ADC_FIFOC_FS __BITS(31,29)
+#define ADC_FS_48KHZ 0
+#define ADC_FS_32KHZ 1
+#define ADC_FS_24KHZ 2
+#define ADC_FS_16KHZ 3
+#define ADC_FS_12KHZ 4
+#define DAC_FS_8KHZ 5
+#define ADC_FIFOC_EN_AD __BIT(28)
+#define ADC_FIFOC_RX_FIFO_MODE __BIT(24)
+#define ADC_FIFOC_RX_TRIG_LEVEL __BITS(12,8)
+#define ADC_FIFOC_MONO_EN __BIT(7)
+#define ADC_FIFOC_RX_SAMPLE_BITS __BIT(6)
+#define ADC_FIFOC_DRQ_EN __BIT(4)
+#define ADC_FIFOC_IRQ_EN __BIT(3)
+#define ADC_FIFOC_OVERRUN_IRQ_EN __BIT(2)
+#define ADC_FIFOC_FIFO_FLUSH __BIT(1)
+/* ADC_FIFOS */
+#define ADC_FIFOS_RXA __BIT(23)
+#define ADC_FIFOS_RXA_CNT __BITS(13,8)
+#define ADC_FIFOS_RXA_INT __BIT(3)
+#define ADC_FIFOS_RXO_INT __BIT(1)
+/* ADC_ACTL */
+#define ADC_ACTL_ADCREN __BIT(31)
+#define ADC_ACTL_ADCLEN __BIT(30)
+#define ADC_ACTL_PREG1EN __BIT(29)
+#define ADC_ACTL_PREG2EN __BIT(28)
+#define ADC_ACTL_VMICEN __BIT(27)
+#define ADC_ACTL_ADCG __BITS(22,20)
+#define ADC_ACTL_ADCIS __BITS(19,17)
+#define ADC_ACTL_LNRDF __BIT(16)
+#define ADC_ACTL_LNPREG __BIT(15)
+#define ADC_ACTL_LHPOUTN __BIT(11)
+#define ADC_ACTL_RHPOUTN __BIT(10)
+#define ADC_ACTL_DITHER __BIT(8)
+#define ADC_ACTL_DITHER_CLK_SELECT __BITS(7,6)
+#define ADC_ACTL_PA_EN __BIT(4)
+#define ADC_ACTL_DDE __BIT(3)
+#define ADC_ACTL_COMPTEN __BIT(2)
+#define ADC_ACTL_PTDBS __BITS(1,0)
+/* OM_ADCA_CTRL */
+#define OM_ADCA_CTRL_ADCREN __BIT(31)
+#define OM_ADCA_CTRL_ADCLEN __BIT(30)
+#define OM_ADCA_CTRL_ADCRG __BITS(29,27)
+#define OM_ADCA_CTRL_ADCLG __BITS(26,24)
+#define OM_ADCA_CTRL_RADCMIXMUTE __BITS(13,7)
+#define OM_ADCA_CTRL_LADCMIXMUTE __BITS(6,0)
+/* OM_PA_CTRL */
+#define OM_PA_CTRL_HPPAEN __BIT(31)
+#define OM_PA_CTRL_HPCOM_CTL __BITS(30,29)
+#define OM_PA_CTRL_COMTEN __BIT(28)
+#define OM_PA_CTRL_PA_ANTI_POP_CTRL __BITS(27,26)
+#define OM_PA_CTRL_MIC1G __BITS(17,15)
+#define OM_PA_CTRL_MIC2G __BITS(14,12)
+#define OM_PA_CTRL_LINEING __BITS(11,9)
+#define OM_PA_CTRL_PHONEG __BITS(8,6)
+#define OM_PA_CTRL_PHONEPG __BITS(5,3)
+#define OM_PA_CTRL_PHONENG __BITS(2,0)
+/* MIC_CTRL */
+#define MIC_CTRL_HBIASEN __BIT(31)
+#define MIC_CTRL_MBIASEN __BIT(30)
+#define MIC_CTRL_HBIASADCEN __BIT(29)
+#define MIC_CTRL_MIC1AMPEN __BIT(28)
+#define MIC_CTRL_MIC1BOOST __BITS(27,25)
+#define MIC_CTRL_MIC2AMPEN __BIT(24)
+#define MIC_CTRL_MIC2BOOST __BITS(23,21)
+#define MIC_CTRL_MIC2SLT __BIT(20)
+#define MIC_CTRL_LINEOUTLEN __BIT(19)
+#define MIC_CTRL_LINEOUTREN __BIT(18)
+#define MIC_CTRL_LINEOUTLSRC __BIT(17)
+#define MIC_CTRL_LINEOUTRSRC __BIT(16)
+#define MIC_CTRL_LINEOUTVC __BITS(15,11)
+#define MIC_CTRL_PHONEPREG __BITS(10,8)
+#define MIC_CTRL_PHONEOUTG __BITS(7,5)
+#define MIC_CTRL_PHONEOUTEN __BIT(4)
+#define MIC_CTRL_PHONEOUTS0 __BIT(3)
+#define MIC_CTRL_PHONEOUTS1 __BIT(2)
+#define MIC_CTRL_PHONEOUTS2 __BIT(1)
+#define MIC_CTRL_PHONEOUTS3 __BIT(0)
+
+struct awinac_dma {
+ LIST_ENTRY(awinac_dma) dma_list;
+ bus_dmamap_t dma_map;
+ void *dma_addr;
+ size_t dma_size;
+ bus_dma_segment_t dma_segs[1];
+ int dma_nsegs;
+};
+
+struct awinac_softc {
+ device_t sc_dev;
+ device_t sc_audiodev;
+
+ bus_space_tag_t sc_bst;
+ bus_space_handle_t sc_bsh;
+ bus_dma_tag_t sc_dmat;
+
+ unsigned int sc_regmap;
+
+ LIST_HEAD(, awinac_dma) sc_dmalist;
+
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