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[src/netbsd-7]: src/sys Pull up following revision(s) (requested by skrll in ...



details:   https://anonhg.NetBSD.org/src/rev/fe179f0620c3
branches:  netbsd-7
changeset: 798516:fe179f0620c3
user:      martin <martin%NetBSD.org@localhost>
date:      Sun Nov 09 16:05:25 2014 +0000

description:
Pull up following revision(s) (requested by skrll in ticket #188):
        sys/arch/arm/include/arm32/pmap.h: revision 1.136
        sys/arch/arm/include/armreg.h: revision 1.100
        sys/arch/arm/cortex/gic.c: revision 1.11
        sys/arch/arm/arm32/db_interface.c: revision 1.54
        sys/arch/arm/include/armreg.h: revision 1.101
        sys/arch/arm/cortex/gic.c: revision 1.12
        sys/arch/arm/arm32/arm32_machdep.c: revision 1.107
        sys/arch/arm/arm/cpufunc_asm_armv7.S: revision 1.19
        sys/arch/arm/cortex/a9_mpsubr.S: revision 1.20
        sys/arch/evbarm/conf/BPI: revision 1.5
        sys/arch/arm/cortex/a9_mpsubr.S: revision 1.21
        sys/arch/arm/arm32/pmap.c: revision 1.306
        sys/arch/arm/arm32/db_machdep.c: revision 1.22
        sys/arch/arm/arm32/arm32_tlb.c: revision 1.3
        sys/arch/arm/arm/undefined.c: revision 1.55
        sys/arch/arm/cortex/a9_mpsubr.S: revision 1.22
        sys/arch/arm/arm32/pmap.c: revision 1.307
        sys/arch/arm/arm32/arm32_tlb.c: revision 1.4
        sys/arch/arm/cortex/a9_mpsubr.S: revision 1.23
        sys/arch/arm/arm32/arm32_tlb.c: revision 1.5
        sys/arch/evbarm/conf/BPI: revision 1.8
        sys/arch/arm/cortex/a9_mpsubr.S: revision 1.24
        sys/arch/arm/arm32/arm32_tlb.c: revision 1.6
        sys/arch/arm/arm32/arm32_tlb.c: revision 1.7
        sys/arch/evbarm/conf/CUBIETRUCK: revision 1.5
        sys/arch/arm/pic/pic.c: revision 1.23
        sys/arch/arm/pic/pic.c: revision 1.24
        sys/arch/arm/pic/picvar.h: revision 1.11
        sys/arch/arm/arm/cpufunc_asm_armv7.S: revision 1.20
        sys/arch/arm/mainbus/cpu_mainbus.c: revision 1.16
        sys/arch/arm/arm32/pmap.c: revision 1.298
        sys/arch/arm/arm/cpufunc_asm_arm11.S: revision 1.17
        sys/arch/arm/arm/cpufunc_asm_pj4b.S: revision 1.5
        sys/arch/arm/arm32/pmap.c: revision 1.310
        sys/arch/arm/arm32/pmap.c: revision 1.311
        sys/arch/arm/arm32/arm32_kvminit.c: revision 1.32
        sys/arch/arm/cortex/a9_mpsubr.S: revision 1.19
        sys/arch/arm/arm32/arm32_boot.c: revision 1.10
        sys/arch/arm/arm/ast.c: revision 1.25
        sys/arch/arm/include/armreg.h: revision 1.98
        sys/uvm/pmap/pmap_tlb.c: revision 1.10
        sys/arch/arm/arm32/arm32_boot.c: revision 1.8
        sys/arch/arm/arm32/arm32_boot.c: revision 1.9
        sys/arch/arm/arm/arm_machdep.c: revision 1.43
Various ARM MP fixes.

diffstat:

 sys/arch/arm/arm/arm_machdep.c       |    5 +-
 sys/arch/arm/arm/cpufunc_asm_arm11.S |   11 ++-
 sys/arch/arm/arm/cpufunc_asm_armv7.S |    7 +-
 sys/arch/arm/arm/cpufunc_asm_pj4b.S  |    3 +-
 sys/arch/arm/arm/undefined.c         |    7 +-
 sys/arch/arm/arm32/arm32_boot.c      |   14 ++-
 sys/arch/arm/arm32/arm32_kvminit.c   |    6 +-
 sys/arch/arm/arm32/arm32_machdep.c   |    5 +-
 sys/arch/arm/arm32/arm32_tlb.c       |   18 ++++-
 sys/arch/arm/arm32/db_interface.c    |    5 +-
 sys/arch/arm/arm32/db_machdep.c      |    6 +-
 sys/arch/arm/arm32/pmap.c            |  118 ++++++++++++++++++++++++----------
 sys/arch/arm/cortex/a9_mpsubr.S      |   39 +++++++----
 sys/arch/arm/cortex/gic.c            |   11 ++-
 sys/arch/arm/include/arm32/pmap.h    |    3 +-
 sys/arch/arm/include/armreg.h        |   23 ++----
 sys/arch/arm/mainbus/cpu_mainbus.c   |    5 +-
 sys/arch/arm/pic/pic.c               |    8 +-
 sys/arch/arm/pic/picvar.h            |    4 +-
 sys/arch/evbarm/conf/BPI             |    5 +-
 sys/arch/evbarm/conf/CUBIETRUCK      |   11 +--
 sys/uvm/pmap/pmap_tlb.c              |    6 +-
 22 files changed, 198 insertions(+), 122 deletions(-)

diffs (truncated from 1073 to 300 lines):

diff -r 58c3a336b738 -r fe179f0620c3 sys/arch/arm/arm/arm_machdep.c
--- a/sys/arch/arm/arm/arm_machdep.c    Sun Nov 09 14:50:23 2014 +0000
+++ b/sys/arch/arm/arm/arm_machdep.c    Sun Nov 09 16:05:25 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: arm_machdep.c,v 1.42 2014/06/14 09:13:30 ozaki-r Exp $ */
+/*     $NetBSD: arm_machdep.c,v 1.42.2.1 2014/11/09 16:05:25 martin Exp $      */
 
 /*
  * Copyright (c) 2001 Wasabi Systems, Inc.
@@ -75,10 +75,11 @@
 #include "opt_cpuoptions.h"
 #include "opt_cputypes.h"
 #include "opt_arm_debug.h"
+#include "opt_multiprocessor.h"
 
 #include <sys/param.h>
 
-__KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.42 2014/06/14 09:13:30 ozaki-r Exp $");
+__KERNEL_RCSID(0, "$NetBSD: arm_machdep.c,v 1.42.2.1 2014/11/09 16:05:25 martin Exp $");
 
 #include <sys/exec.h>
 #include <sys/proc.h>
diff -r 58c3a336b738 -r fe179f0620c3 sys/arch/arm/arm/cpufunc_asm_arm11.S
--- a/sys/arch/arm/arm/cpufunc_asm_arm11.S      Sun Nov 09 14:50:23 2014 +0000
+++ b/sys/arch/arm/arm/cpufunc_asm_arm11.S      Sun Nov 09 16:05:25 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc_asm_arm11.S,v 1.15 2014/07/31 10:44:58 skrll Exp $     */
+/*     $NetBSD: cpufunc_asm_arm11.S,v 1.15.2.1 2014/11/09 16:05:25 martin Exp $        */
 
 /*
  * Copyright (c) 2002, 2005 ARM Limited
@@ -99,7 +99,8 @@
 
 ENTRY(arm11_tlb_flushI_SE)
 #ifdef ARM_MMU_EXTENDED
-       orr     r0, r0, r1              /* insert ASID into MVA */
+       bic     r0, r0, #0xff
+       bic     r0, r0, #0xf00          /* Always KERNEL_PID, i.e. 0 */
 #endif
        mcr     p15, 0, r0, c8, c5, 1   /* flush I tlb single entry */
 #if PAGE_SIZE == 2 * L2_S_SIZE
@@ -121,7 +122,8 @@
 
 ENTRY(arm11_tlb_flushD_SE)
 #ifdef ARM_MMU_EXTENDED
-       orr     r0, r0, r1              /* insert ASID into MVA */
+       bic     r0, r0, #0xff
+       bic     r0, r0, #0xf00          /* Always KERNEL_PID, i.e. 0 */
 #endif
        mcr     p15, 0, r0, c8, c6, 1   /* flush D tlb single entry */
 #if PAGE_SIZE == 2 * L2_S_SIZE
@@ -142,7 +144,8 @@
 
 ENTRY(arm11_tlb_flushID_SE)
 #ifdef ARM_MMU_EXTENDED
-       orr     r0, r0, r1              /* insert ASID into MVA */
+       bic     r0, r0, #0xff
+       bic     r0, r0, #0xf00          /* Always KERNEL_PID, i.e. 0 */
 #endif
        mcr     p15, 0, r0, c8, c7, 1   /* flush I+D tlb single entry */
 #if PAGE_SIZE == 2 * L2_S_SIZE
diff -r 58c3a336b738 -r fe179f0620c3 sys/arch/arm/arm/cpufunc_asm_armv7.S
--- a/sys/arch/arm/arm/cpufunc_asm_armv7.S      Sun Nov 09 14:50:23 2014 +0000
+++ b/sys/arch/arm/arm/cpufunc_asm_armv7.S      Sun Nov 09 16:05:25 2014 +0000
@@ -78,10 +78,7 @@
 STRONG_ALIAS(armv7_tlb_flushD_SE, armv7_tlb_flushID_SE)
 STRONG_ALIAS(armv7_tlb_flushI_SE, armv7_tlb_flushID_SE)
 ENTRY(armv7_tlb_flushID_SE)
-       bfc     r0, #0, #12             @ clear ASID
-#ifdef ARM_MMU_EXTENDED
-       bfi     r0, r1, #0, #8          @ insert ASID into MVA
-#endif
+       bfc     r0, #0, #12             @ Always KERNEL_PID, i.e. 0
 #ifdef MULTIPROCESSOR
        mcr     p15, 0, r0, c8, c3, 1   @ flush I+D tlb single entry
 #if PAGE_SIZE == 2*L2_S_SIZE
@@ -380,6 +377,7 @@
        b       1b
 
 .Lnext_level_inv:
+       dsb
        mrc     p15, 1, r0, c0, c0, 1   @ read CLIDR
        ubfx    ip, r0, #24, #3         @ narrow to LoC
        add     r3, r3, #2              @ go to next level
@@ -440,6 +438,7 @@
        b       1b
 
 .Lnext_level_wbinv:
+       dsb
        mrc     p15, 1, r0, c0, c0, 1   @ read CLIDR
        ubfx    ip, r0, #24, #3         @ narrow to LoC
        add     r3, r3, #2              @ go to next level
diff -r 58c3a336b738 -r fe179f0620c3 sys/arch/arm/arm/cpufunc_asm_pj4b.S
--- a/sys/arch/arm/arm/cpufunc_asm_pj4b.S       Sun Nov 09 14:50:23 2014 +0000
+++ b/sys/arch/arm/arm/cpufunc_asm_pj4b.S       Sun Nov 09 16:05:25 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc_asm_pj4b.S,v 1.4 2014/03/30 01:15:03 matt Exp $ */
+/*     $NetBSD: cpufunc_asm_pj4b.S,v 1.4.6.1 2014/11/09 16:05:25 martin Exp $ */
 
 /*******************************************************************************
 Copyright (C) Marvell International Ltd. and its affiliates
@@ -78,6 +78,7 @@
 END(pj4b_tlb_flushID)
 
 ENTRY(pj4b_tlb_flushID_SE)
+       bfc     r0, #0, #12             @ always KERNEL_PID (i.e. 0)
        mcr     p15, 0, r0, c8, c7, 1   @flush I+D tlb single entry
 #if PAGE_SIZE == 2 * L2_S_SIZE
        add     r0, r0, L2_S_SIZE
diff -r 58c3a336b738 -r fe179f0620c3 sys/arch/arm/arm/undefined.c
--- a/sys/arch/arm/arm/undefined.c      Sun Nov 09 14:50:23 2014 +0000
+++ b/sys/arch/arm/arm/undefined.c      Sun Nov 09 16:05:25 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: undefined.c,v 1.54 2014/03/28 21:44:35 matt Exp $      */
+/*     $NetBSD: undefined.c,v 1.54.4.1 2014/11/09 16:05:25 martin Exp $        */
 
 /*
  * Copyright (c) 2001 Ben Harris.
@@ -55,7 +55,7 @@
 #include <sys/kgdb.h>
 #endif
 
-__KERNEL_RCSID(0, "$NetBSD: undefined.c,v 1.54 2014/03/28 21:44:35 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: undefined.c,v 1.54.4.1 2014/11/09 16:05:25 martin Exp $");
 
 #include <sys/kmem.h>
 #include <sys/queue.h>
@@ -102,7 +102,8 @@
        KASSERT(coproc >= 0 && coproc < NUM_UNKNOWN_HANDLERS);
        KASSERT(handler != NULL); /* Used to be legal. */
 
-       uh = kmem_alloc(sizeof(*uh), KM_SLEEP);
+       uh = kmem_alloc(sizeof(*uh), KM_NOSLEEP);
+       KASSERT(uh != NULL);
        uh->uh_handler = handler;
        install_coproc_handler_static(coproc, uh);
        return uh;
diff -r 58c3a336b738 -r fe179f0620c3 sys/arch/arm/arm32/arm32_boot.c
--- a/sys/arch/arm/arm32/arm32_boot.c   Sun Nov 09 14:50:23 2014 +0000
+++ b/sys/arch/arm/arm32/arm32_boot.c   Sun Nov 09 16:05:25 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: arm32_boot.c,v 1.7 2014/03/28 21:39:09 matt Exp $      */
+/*     $NetBSD: arm32_boot.c,v 1.7.4.1 2014/11/09 16:05:25 martin Exp $        */
 
 /*
  * Copyright (c) 2002, 2003, 2005  Genetec Corporation.  All rights reserved.
@@ -123,10 +123,11 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: arm32_boot.c,v 1.7 2014/03/28 21:39:09 matt Exp $");
+__KERNEL_RCSID(1, "$NetBSD: arm32_boot.c,v 1.7.4.1 2014/11/09 16:05:25 martin Exp $");
 
 #include "opt_ddb.h"
 #include "opt_kgdb.h"
+#include "opt_multiprocessor.h"
 
 #include <sys/param.h>
 #include <sys/reboot.h>
@@ -351,13 +352,13 @@
        printf(" stacks");
 #endif
        set_stackptr(PSR_FIQ32_MODE,
-           fiqstack.pv_va + cpu_index(ci) * FIQ_STACK_SIZE * PAGE_SIZE);
+           fiqstack.pv_va + (cpu_index(ci) + 1) * FIQ_STACK_SIZE * PAGE_SIZE);
        set_stackptr(PSR_IRQ32_MODE,
-           irqstack.pv_va + cpu_index(ci) * IRQ_STACK_SIZE * PAGE_SIZE);
+           irqstack.pv_va + (cpu_index(ci) + 1) * IRQ_STACK_SIZE * PAGE_SIZE);
        set_stackptr(PSR_ABT32_MODE,
-           abtstack.pv_va + cpu_index(ci) * ABT_STACK_SIZE * PAGE_SIZE);
+           abtstack.pv_va + (cpu_index(ci) + 1) * ABT_STACK_SIZE * PAGE_SIZE);
        set_stackptr(PSR_UND32_MODE,
-           undstack.pv_va + cpu_index(ci) * UND_STACK_SIZE * PAGE_SIZE);
+           undstack.pv_va + (cpu_index(ci) + 1) * UND_STACK_SIZE * PAGE_SIZE);
 
        ci->ci_lastlwp = NULL;
        ci->ci_pmap_lastuser = NULL;
@@ -408,6 +409,7 @@
        printf(" done!\n");
 #endif
        atomic_and_32(&arm_cpu_mbox, ~(1 << cpuid));
+       membar_producer();
        __asm __volatile("sev; sev; sev");
 }
 #endif /* MULTIPROCESSOR */
diff -r 58c3a336b738 -r fe179f0620c3 sys/arch/arm/arm32/arm32_kvminit.c
--- a/sys/arch/arm/arm32/arm32_kvminit.c        Sun Nov 09 14:50:23 2014 +0000
+++ b/sys/arch/arm/arm32/arm32_kvminit.c        Sun Nov 09 16:05:25 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: arm32_kvminit.c,v 1.30 2014/05/23 13:24:15 kiyohara Exp $      */
+/*     $NetBSD: arm32_kvminit.c,v 1.30.2.1 2014/11/09 16:05:25 martin Exp $    */
 
 /*
  * Copyright (c) 2002, 2003, 2005  Genetec Corporation.  All rights reserved.
@@ -121,8 +121,10 @@
  * SUCH DAMAGE.
  */
 
+#include "opt_multiprocessor.h"
+
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: arm32_kvminit.c,v 1.30 2014/05/23 13:24:15 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: arm32_kvminit.c,v 1.30.2.1 2014/11/09 16:05:25 martin Exp $");
 
 #include <sys/param.h>
 #include <sys/device.h>
diff -r 58c3a336b738 -r fe179f0620c3 sys/arch/arm/arm32/arm32_machdep.c
--- a/sys/arch/arm/arm32/arm32_machdep.c        Sun Nov 09 14:50:23 2014 +0000
+++ b/sys/arch/arm/arm32/arm32_machdep.c        Sun Nov 09 16:05:25 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: arm32_machdep.c,v 1.105 2014/05/19 22:47:53 rmind Exp $        */
+/*     $NetBSD: arm32_machdep.c,v 1.105.2.1 2014/11/09 16:05:25 martin Exp $   */
 
 /*
  * Copyright (c) 1994-1998 Mark Brinicombe.
@@ -42,11 +42,12 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: arm32_machdep.c,v 1.105 2014/05/19 22:47:53 rmind Exp $");
+__KERNEL_RCSID(0, "$NetBSD: arm32_machdep.c,v 1.105.2.1 2014/11/09 16:05:25 martin Exp $");
 
 #include "opt_modular.h"
 #include "opt_md.h"
 #include "opt_pmap_debug.h"
+#include "opt_multiprocessor.h"
 
 #include <sys/param.h>
 #include <sys/systm.h>
diff -r 58c3a336b738 -r fe179f0620c3 sys/arch/arm/arm32/arm32_tlb.c
--- a/sys/arch/arm/arm32/arm32_tlb.c    Sun Nov 09 14:50:23 2014 +0000
+++ b/sys/arch/arm/arm32/arm32_tlb.c    Sun Nov 09 16:05:25 2014 +0000
@@ -26,8 +26,11 @@
  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  * POSSIBILITY OF SUCH DAMAGE.
  */
+
+#include "opt_multiprocessor.h"
+
 #include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: arm32_tlb.c,v 1.2 2014/04/11 02:39:03 matt Exp $");
+__KERNEL_RCSID(1, "$NetBSD: arm32_tlb.c,v 1.2.6.1 2014/11/09 16:05:25 martin Exp $");
 
 #include <sys/param.h>
 #include <sys/types.h>
@@ -48,8 +51,9 @@
 tlb_set_asid(tlb_asid_t asid)
 {
        arm_dsb();
-       if (asid == 0) {
+       if (asid == KERNEL_PID) {
                armreg_ttbcr_write(armreg_ttbcr_read() | TTBCR_S_PD0);
+               arm_isb();
        }
        armreg_contextidr_write(asid);
        arm_isb();
@@ -60,7 +64,11 @@
 {
        const bool vivt_icache_p = arm_pcache.icache_type == CACHE_TYPE_VIVT;
        arm_dsb();
+#ifdef MULTIPROCESSOR
+       armreg_tlbiallis_write(0);
+#else
        armreg_tlbiall_write(0);
+#endif
        arm_isb();
        if (__predict_false(vivt_icache_p)) {
                if (arm_has_tlbiasid_p) {
@@ -85,7 +93,7 @@
        arm_dsb();
        if (arm_has_tlbiasid_p) {
                for (; lo <= hi; lo++) {
-                       armreg_tlbiasid_write(lo);
+                       armreg_tlbiasidis_write(lo);
                }
                arm_isb();
                if (__predict_false(vivt_icache_p)) {
@@ -107,7 +115,11 @@
        arm_dsb();
        va = trunc_page(va) | asid;
        for (vaddr_t eva = va + PAGE_SIZE; va < eva; va += L2_S_SIZE) {
+#ifdef MULTIPROCESSOR
+               armreg_tlbimvais_write(va);
+#else
                armreg_tlbimva_write(va);
+#endif
                //armreg_tlbiall_write(asid);
        }
        arm_isb();
diff -r 58c3a336b738 -r fe179f0620c3 sys/arch/arm/arm32/db_interface.c
--- a/sys/arch/arm/arm32/db_interface.c Sun Nov 09 14:50:23 2014 +0000
+++ b/sys/arch/arm/arm32/db_interface.c Sun Nov 09 16:05:25 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: db_interface.c,v 1.52 2014/03/30 08:00:34 skrll Exp $  */
+/*     $NetBSD: db_interface.c,v 1.52.4.1 2014/11/09 16:05:25 martin Exp $     */
 
 /*
  * Copyright (c) 1996 Scott K. Stevens
@@ -35,10 +35,11 @@
  */



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