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[src/trunk]: src/sys/arch/arm Support __HAVE_PIC_SET_PRIORITY for Armada XP.



details:   https://anonhg.NetBSD.org/src/rev/ae91aec2e07a
branches:  trunk
changeset: 791477:ae91aec2e07a
user:      kiyohara <kiyohara%NetBSD.org@localhost>
date:      Wed Nov 20 12:16:47 2013 +0000

description:
Support __HAVE_PIC_SET_PRIORITY for Armada XP.

diffstat:

 sys/arch/arm/marvell/armadaxp.c      |   57 ++++++++----
 sys/arch/arm/marvell/mvsoc_intr.c    |   12 +--
 sys/arch/arm/marvell/mvsoc_intr.h    |    8 +-
 sys/arch/arm/pic/armadaxp_splfuncs.c |  157 -----------------------------------
 sys/arch/arm/pic/files.pic           |    5 +-
 5 files changed, 50 insertions(+), 189 deletions(-)

diffs (truncated from 356 to 300 lines):

diff -r 667cfda0d11c -r ae91aec2e07a sys/arch/arm/marvell/armadaxp.c
--- a/sys/arch/arm/marvell/armadaxp.c   Wed Nov 20 11:39:00 2013 +0000
+++ b/sys/arch/arm/marvell/armadaxp.c   Wed Nov 20 12:16:47 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: armadaxp.c,v 1.3 2013/09/30 13:03:25 kiyohara Exp $    */
+/*     $NetBSD: armadaxp.c,v 1.4 2013/11/20 12:16:47 kiyohara Exp $    */
 /*******************************************************************************
 Copyright (C) Marvell International Ltd. and its affiliates
 
@@ -37,7 +37,7 @@
 *******************************************************************************/
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: armadaxp.c,v 1.3 2013/09/30 13:03:25 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: armadaxp.c,v 1.4 2013/11/20 12:16:47 kiyohara Exp $");
 
 #define _INTR_PRIVATE
 
@@ -91,8 +91,10 @@
 static void armadaxp_pic_unblock_irqs(struct pic_softc *, size_t, uint32_t);
 static void armadaxp_pic_block_irqs(struct pic_softc *, size_t, uint32_t);
 static void armadaxp_pic_establish_irq(struct pic_softc *, struct intrsource *);
+static void armadaxp_pic_set_priority(struct pic_softc *, int);
 
-void armadaxp_handle_irq(void *);
+static int armadaxp_find_pending_irqs(void);
+static void armadaxp_pic_block_irq(struct pic_softc *, size_t);
 void armadaxp_io_coherency_init(void);
 int armadaxp_l2_init(bus_addr_t);
 
@@ -137,6 +139,7 @@
        .pic_unblock_irqs = armadaxp_pic_unblock_irqs,
        .pic_block_irqs = armadaxp_pic_block_irqs,
        .pic_establish_irq = armadaxp_pic_establish_irq,
+       .pic_set_priority = armadaxp_pic_set_priority,
 };
 
 static struct pic_softc armadaxp_pic = {
@@ -188,7 +191,8 @@
        /* Enable IRQ prioritization */
        ctrl |= (1 << 0);
        MPIC_WRITE(ARMADAXP_MLMB_MPIC_CTRL, ctrl);
-       MPIC_CPU_WRITE(ARMADAXP_MLMB_MPIC_CTP, curcpl() << MPIC_CTP_SHIFT);
+
+       find_pending_irqs = armadaxp_find_pending_irqs;
 }
 
 static void
@@ -236,30 +240,47 @@
            tmp | (is->is_ipl << MPIC_ISCR_SHIFT));
 }
 
-void
-armadaxp_handle_irq(void *frame)
+static void
+armadaxp_pic_set_priority(struct pic_softc *pic, int ipl)
+{
+       int ctp;
+
+       ctp = MPIC_CPU_READ(ARMADAXP_MLMB_MPIC_CTP);
+       ctp &= ~(0xf << MPIC_CTP_SHIFT);
+       ctp |= (ipl << MPIC_CTP_SHIFT);
+       MPIC_CPU_WRITE(ARMADAXP_MLMB_MPIC_CTP, ctp);
+}
+
+static int
+armadaxp_find_pending_irqs(void)
 {
        struct intrsource *is;
        int irq;
-       u_int irqstate;
 
        irq = MPIC_CPU_READ(ARMADAXP_MLMB_MPIC_IIACK) & 0x3ff;
 
        /* Is it a spurious interrupt ?*/
        if (irq == 0x3ff)
-               return;
-
+               return 0;
        is = armadaxp_pic.pic_sources[irq];
-       if (is != NULL)  {
-               KASSERT(is->is_ipl > curcpu()->ci_cpl);
-               /* Dispatch irq */
-               irqstate = disable_interrupts(I32_bit);
-               pic_dispatch(is, frame);
-               restore_interrupts(irqstate);
+       if (is == NULL) {
+               printf("stray interrupt: %d\n", irq);
+               return 0;
        }
-#ifdef __HAVE_FAST_SOFTINTS
-       cpu_dosoftints();
-#endif
+
+       armadaxp_pic_block_irq(&armadaxp_pic, irq);
+       pic_mark_pending(&armadaxp_pic, irq);
+
+       return is->is_ipl;
+}
+
+static void
+armadaxp_pic_block_irq(struct pic_softc *pic, size_t irq)
+{
+
+       KASSERT(pic->pic_maxsources >= irq);
+       MPIC_WRITE(ARMADAXP_MLMB_MPIC_ICE, irq);
+       MPIC_CPU_WRITE(ARMADAXP_MLMB_MPIC_ISM, irq);
 }
 
 /*
diff -r 667cfda0d11c -r ae91aec2e07a sys/arch/arm/marvell/mvsoc_intr.c
--- a/sys/arch/arm/marvell/mvsoc_intr.c Wed Nov 20 11:39:00 2013 +0000
+++ b/sys/arch/arm/marvell/mvsoc_intr.c Wed Nov 20 12:16:47 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: mvsoc_intr.c,v 1.7 2013/09/30 13:22:22 kiyohara Exp $  */
+/*     $NetBSD: mvsoc_intr.c,v 1.8 2013/11/20 12:16:47 kiyohara Exp $  */
 /*
  * Copyright (c) 2010 KIYOHARA Takashi
  * All rights reserved.
@@ -26,7 +26,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: mvsoc_intr.c,v 1.7 2013/09/30 13:22:22 kiyohara Exp $");
+__KERNEL_RCSID(0, "$NetBSD: mvsoc_intr.c,v 1.8 2013/11/20 12:16:47 kiyohara Exp $");
 
 #include "opt_mvsoc.h"
 
@@ -42,9 +42,6 @@
 #include <arm/marvell/mvsocreg.h>
 #include <arm/marvell/mvsocvar.h>
 
-#if defined(ARMADAXP)
-extern void armadaxp_handle_irq(void *);
-#endif
 
 int (*find_pending_irqs)(void);
 
@@ -80,10 +77,6 @@
 mvsoc_irq_handler(void *frame)
 {
        struct cpu_info * const ci = curcpu();
-#if defined(ARMADAXP)
-       ci->ci_data.cpu_nintr++;
-       armadaxp_handle_irq(frame);
-#else
        const int oldipl = ci->ci_cpl;
        const uint32_t oldipl_mask = __BIT(oldipl);
        int ipl_mask = 0;
@@ -97,7 +90,6 @@
         */
        if ((ipl_mask & ~oldipl_mask) > oldipl_mask)
                pic_do_pending_ints(I32_bit, oldipl, frame);
-#endif
 }
 
 /*
diff -r 667cfda0d11c -r ae91aec2e07a sys/arch/arm/marvell/mvsoc_intr.h
--- a/sys/arch/arm/marvell/mvsoc_intr.h Wed Nov 20 11:39:00 2013 +0000
+++ b/sys/arch/arm/marvell/mvsoc_intr.h Wed Nov 20 12:16:47 2013 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: mvsoc_intr.h,v 1.2 2012/07/29 00:07:10 matt Exp $      */
+/*     $NetBSD: mvsoc_intr.h,v 1.3 2013/11/20 12:16:47 kiyohara Exp $  */
 /*
  * Copyright (c) 2010 KIYOHARA Takashi
  * All rights reserved.
@@ -28,6 +28,12 @@
 #ifndef _MVSOC_INTR_H_
 #define _MVSOC_INTR_H_
 
+#include "opt_mvsoc.h"
+
+#if defined(ARMADAXP)
+#define __HAVE_PIC_SET_PRIORITY
+#endif
+
 #define ARM_IRQ_HANDLER        _C_LABEL(mvsoc_irq_handler)
 
 #ifndef _LOCORE
diff -r 667cfda0d11c -r ae91aec2e07a sys/arch/arm/pic/armadaxp_splfuncs.c
--- a/sys/arch/arm/pic/armadaxp_splfuncs.c      Wed Nov 20 11:39:00 2013 +0000
+++ /dev/null   Thu Jan 01 00:00:00 1970 +0000
@@ -1,157 +0,0 @@
-/*     $NetBSD: armadaxp_splfuncs.c,v 1.3 2013/10/03 12:53:29 skrll Exp $      */
-/*******************************************************************************
-Copyright (C) Marvell International Ltd. and its affiliates
-
-Developed by Semihalf
-
-********************************************************************************
-Marvell BSD License
-
-If you received this File from Marvell, you may opt to use, redistribute and/or
-modify this File under the following licensing terms.
-Redistribution and use in source and binary forms, with or without modification,
-are permitted provided that the following conditions are met:
-
-    *   Redistributions of source code must retain the above copyright notice,
-            this list of conditions and the following disclaimer.
-
-    *   Redistributions in binary form must reproduce the above copyright
-        notice, this list of conditions and the following disclaimer in the
-        documentation and/or other materials provided with the distribution.
-
-    *   Neither the name of Marvell nor the names of its contributors may be
-        used to endorse or promote products derived from this software without
-        specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
-ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
-*******************************************************************************/
-
-#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: armadaxp_splfuncs.c,v 1.3 2013/10/03 12:53:29 skrll Exp $");
-
-#define _INTR_PRIVATE
-
-#include "opt_mvsoc.h"
-
-#include <sys/param.h>
-#include <sys/bus.h>
-
-#include <machine/intr.h>
-
-#include <arm/pic/picvar.h>
-
-#include <arm/armreg.h>
-#include <arm/cpu.h>
-#include <arm/cpufunc.h>
-
-#include <arm/marvell/mvsocreg.h>
-#include <arm/marvell/mvsocvar.h>
-#include <arm/marvell/armadaxpreg.h>
-
-#include <evbarm/marvell/marvellreg.h>
-#include <dev/marvell/marvellreg.h>
-
-extern bus_space_handle_t mpic_cpu_handle;
-
-#define        MPIC_WRITE(reg, val)            (bus_space_write_4(&mvsoc_bs_tag, \
-                                           mpic_handle, reg, val))
-#define        MPIC_CPU_WRITE(reg, val)        (bus_space_write_4(&mvsoc_bs_tag, \
-                                           mpic_cpu_handle, reg, val))
-
-#define        MPIC_READ(reg)                  (bus_space_read_4(&mvsoc_bs_tag, \
-                                           mpic_handle, reg))
-#define        MPIC_CPU_READ(reg)              (bus_space_read_4(&mvsoc_bs_tag, \
-                                           mpic_cpu_handle, reg))
-
-int
-_splraise(int newipl)
-{
-       struct cpu_info * const ci = curcpu();
-       const int oldipl = ci->ci_cpl;
-       int ctp;
-
-       /*
-        * Disable interrupts in order to avoid disrupt 
-        * while changing the priority level that may cause
-        * mismatch between CTP and ci_cpl values.
-        */
-       register_t psw = disable_interrupts(I32_bit);
-       KASSERT(newipl < NIPL);
-       if (newipl > ci->ci_cpl) {
-               ctp = MPIC_CPU_READ(ARMADAXP_MLMB_MPIC_CTP);
-               ctp &= ~(0xf << MPIC_CTP_SHIFT);
-               ctp |= (newipl << MPIC_CTP_SHIFT);
-               MPIC_CPU_WRITE(ARMADAXP_MLMB_MPIC_CTP, ctp);
-               ci->ci_cpl = newipl;
-       }
-       restore_interrupts(psw);
-
-       return oldipl;
-}
-
-int
-_spllower(int newipl)
-{
-       struct cpu_info * const ci = curcpu();
-       const int oldipl = ci->ci_cpl;
-       int ctp;
-
-       /*
-        * Disable interrupts in order to avoid disrupt 
-        * while changing the priority level that may cause
-        * mismatch between CTP and ci_cpl values.
-        */
-       register_t psw = disable_interrupts(I32_bit);
-       KASSERT(newipl <= ci->ci_cpl);
-       if (newipl < ci->ci_cpl) {
-               ctp = MPIC_CPU_READ(ARMADAXP_MLMB_MPIC_CTP);



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