[src/trunk]: src/sys/arch/arm/arm initialize sdcache operations for PJ4B.

[hsuenaga <hsuenaga%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/aecbf168de2f
branches:  trunk
changeset: 808792:aecbf168de2f
user:      hsuenaga <hsuenaga%NetBSD.org@localhost>
date:      Wed Jun 03 02:30:11 2015 +0000

description:
initialize sdcache operations for PJ4B.
otherwise the kernel crashes without 'options L2CACHE_ENABLE.'

diffstat:

 sys/arch/arm/arm/cpufunc.c |  8 ++++++--
 1 files changed, 6 insertions(+), 2 deletions(-)

diffs (29 lines):

diff -r 22fe6f6199b6 -r aecbf168de2f sys/arch/arm/arm/cpufunc.c
--- a/sys/arch/arm/arm/cpufunc.c        Wed Jun 03 02:17:51 2015 +0000
+++ b/sys/arch/arm/arm/cpufunc.c        Wed Jun 03 02:30:11 2015 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpufunc.c,v 1.154 2015/05/14 05:39:32 hsuenaga Exp $   */
+/*     $NetBSD: cpufunc.c,v 1.155 2015/06/03 02:30:11 hsuenaga Exp $   */
 
 /*
  * arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.154 2015/05/14 05:39:32 hsuenaga Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.155 2015/06/03 02:30:11 hsuenaga Exp $");
 
 #include "opt_compat_netbsd.h"
 #include "opt_cpuoptions.h"
@@ -1380,6 +1380,10 @@
        .cf_dcache_inv_range    = armv7_dcache_inv_range,
        .cf_dcache_wb_range     = armv7_dcache_wb_range,
 
+       .cf_sdcache_wbinv_range = (void *)cpufunc_nullop,
+       .cf_sdcache_inv_range   = (void *)cpufunc_nullop,
+       .cf_sdcache_wb_range    = (void *)cpufunc_nullop,
+
        .cf_idcache_wbinv_all   = armv7_idcache_wbinv_all,
        .cf_idcache_wbinv_range = armv7_idcache_wbinv_range,