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[src/trunk]: src/sys/dev/pci Add workaround for QEMU and the variants that fa...



details:   https://anonhg.NetBSD.org/src/rev/63b22dd3cfe2
branches:  trunk
changeset: 780842:63b22dd3cfe2
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Thu Aug 09 04:16:37 2012 +0000

description:
Add workaround for QEMU and the variants that fail on EEPROM access.

 This problem was discovered a few years ago, but some variants and
cloud services still have the bug. This problem is not NetBSD's bug
but qemus' bug. For NetBSD users, existence of buggy virtual machines
is sad thing, so we add a workaroud.

diffstat:

 sys/dev/pci/if_wm.c |  20 ++++++++++++++++++--
 1 files changed, 18 insertions(+), 2 deletions(-)

diffs (41 lines):

diff -r 18e43ec7f751 -r 63b22dd3cfe2 sys/dev/pci/if_wm.c
--- a/sys/dev/pci/if_wm.c       Thu Aug 09 01:41:47 2012 +0000
+++ b/sys/dev/pci/if_wm.c       Thu Aug 09 04:16:37 2012 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: if_wm.c,v 1.229 2012/07/22 14:33:04 matt Exp $ */
+/*     $NetBSD: if_wm.c,v 1.230 2012/08/09 04:16:37 msaitoh Exp $      */
 
 /*
  * Copyright (c) 2001, 2002, 2003, 2004 Wasabi Systems, Inc.
@@ -76,7 +76,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.229 2012/07/22 14:33:04 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: if_wm.c,v 1.230 2012/08/09 04:16:37 msaitoh Exp $");
 
 #include <sys/param.h>
 #include <sys/systm.h>
@@ -4628,6 +4628,22 @@
                reg = CSR_READ(sc, WMREG_EECD) & ~(EECD_SK | EECD_DI);
                CSR_WRITE(sc, WMREG_EECD, reg);
 
+               /*
+                * XXX: workaround for a bug in qemu-0.12.x and prior
+                * and Xen.
+                *
+                * We use this workaround only for 82540 because qemu's
+                * e1000 act as 82540.
+                */
+               if (sc->sc_type >= WM_T_82540) {
+                       reg |= EECD_SK;
+                       CSR_WRITE(sc, WMREG_EECD, reg);
+                       reg &= ~EECD_SK;
+                       CSR_WRITE(sc, WMREG_EECD, reg);
+                       delay(2);
+               }
+               /* XXX: end of workaround */
+               
                /* Set CHIP SELECT. */
                reg |= EECD_CS;
                CSR_WRITE(sc, WMREG_EECD, reg);



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