Re: CVS commit: src/sys/dev/pci/ixgbe

[SAITOH Masanobu <msaitoh%execsw.org@localhost>]

On 2020/12/11 14:01, SAITOH Masanobu wrote:
> Module Name:	src
> Committed By:	msaitoh
> Date:		Fri Dec 11 05:01:19 UTC 2020
>
> Modified Files:
> 	src/sys/dev/pci/ixgbe: ixgbe.c ixgbe_type.h
>
> Log Message:
>   Don't use EIMC_OTHER bit because it's read only other than 82598.
>
>   Documents say:
>
>    82598:
>       All of bit 31(OTHER bit) of EIxx are reserved. In reality, at least
>      EIMS_OTHER and EIMC_OTHER exist and the OTHER interrupt doesn't work
>      without EIMS_OTHER.
>
>    Other than 82598:

+      EICR's bit 31 is defined and other EIXX's bit 31 are reserved.
+      In reality,

>       EIMS_OTHER is read only and EIMC_OTHER doesn't exist. If one of
>      bit 29..16 is set, EIMS_OTHER is set to 1 (Note that bit 30(TCP timer
>      isn't included)). Even if write bit 31 of EIMC to 1, it's ignored
>      (EIMS_OTHER doesn't set).
>
>   We introduced new spin mutex in ixgbe.c rev. 1.260, so it's OK to remove
> EIMC_OTHER stuff. We already set EIMS_OTHER in if_init(), so keep it for
> 82598. No functional change other than 82598.
>
>   Another solution is to control bit 30..16 directly to mask/unmask interrupt
> instead of the mutex.
>
> TODO:
>    Some MSI-X interrupt(LSC, module insertion/removal etc.)'s mask/unmask
>    code between ixgbe_msix_admin() and ixgbe_handle_admin() may be wrong.
>    It'll be fixed later.
>
>
> To generate a diff of this commit:
> cvs rdiff -u -r1.261 -r1.262 src/sys/dev/pci/ixgbe/ixgbe.c
> cvs rdiff -u -r1.45 -r1.46 src/sys/dev/pci/ixgbe/ixgbe_type.h
>
> Please note that diffs are not public domain; they are subject to the
> copyright notices on the relevant files.


--
-----------------------------------------------
                SAITOH Masanobu (msaitoh%execsw.org@localhost
                                 msaitoh%netbsd.org@localhost)