On 2023-03-08 00:36, Mouse wrote:
The 1GB limit is because of the layout of the registers for the memory mapping. [21 bits for the PFN in a PTE]This got an update on the NVAX, where a different format PTE was defined, in which you have 25 bits for the address. [...]As for the division between memory and I/O space, I guess it could have been done differently on different implementations, but the complexity it would have implied in software if that had been done was probably not something DEC wanted. So in all machines I've ever looked at, the I/O space starts at 512M. Physical memory is always below that.What happens for machines that have more than 512M of physical memory (like that 7000 at LSSM)? It can't _all_ be below the 512M point!
Like I said, the 7000 is an NVAX. When it changes to use the "new" PTE format, more things change.
The exact details I don't have in my head. But the documentation is available. At one point I was thinking of adding support for the 7000 in NetBSD, but I've never come around to it.
However, as far as I am aware, simh do not support this at all anyway, so it means either extending simh with all of this, or work on real hardware... Which also leads to the question/problem of I/O support for XMI, VAXBI, CI and there is a bunch of things to work on then...
Johnny
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|| on a psychedelic trip
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