Re: NetBSD in SIMH vax with 512 MB RAM

[Mouse <mouse%Rodents-Montreal.ORG@localhost>]

>>>> The 512M is physical memory. Physical address space is a total of
>>>> just 1G, with half dedicated to memory, and half to I/O space.

>>> Â  This must be model-specific, somehow?
>> The I/O space starts at 512MB.
> Yes, ah, so memory must be discontiguous in some machines.

I think the "I/O space starts at 512MB" part is machine-specific.

> The VAX-7000 at LSSM has 1.5GB of RAM.

Based on EL-00032-00-decStd32_Jan90 (which I suspect predates the 7000;
it mentions the 3900, so it postdates at least some of its planning):

The hardware has either 21 or 25 bits of PFN in each PTE.  This gives
it either 30 or 34 possible physical address bits.  The VARM says (near
the end of page 7-18)

            ....  The physical address space consists of two parts:   memory
      space  and  I/O  space.   Memory  space  starts  at  address  zero and
      continues to an implementation-dependent limit.  I/O space  begins  at
      that limit and continues to the end of the physical address space.

The original post does not say which model of VAX SIMH was configured
to emulate.  The poster did, in a later message, provide quotes
indicating it's a KA655X-B, and in text said it's "simulating a
MicroVAX 3900".  I don't know the 3900, but the reports that VMS works
with 512M implies that the problem probably isn't that SIMH is
emulating an impossible hardware buildout (I'm talking about things
like the 3900's I/O space occupying, say, megabytes [480-512), which
would conflict with providing 512 of physical memory) - though it could
be just that VMS is smarter at handling "impossible" configurations.

The 7000 you write of presumably has its break between memory and I/O
placed at least 1.5G from address zero.  This is heavily
hardware-depend; for example, the KA630 has RAM from 00000000 to
00ffffff (this range may be only partially populated), Qbus I/O space
from 20000000 to 20001fff, ROM halt-ignored space from 20040000 to
2004ffff, ROM halt-obeyed space from 20050000 to 2005ffff, internal
registers from 20080000-20080010, Qbus mapping registers from 20088000
to 2008ffff, the clock chip from 200b8000 to 200b807f, and, finally,
Qbus memory space from 30000000 to 303fffff.  (I _think_ that's it; if
anyone knows of anything not covered by that I'd love to hear more.)  I
doubt it could work in hardware, beacuse I think it has only 24 address
lines for real memory, but I don't see any reason simulated memory
couldn't exist from 0 all the way to 1fffffff - though it would
probably confuse _something_.

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