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Re: New Vax - future directions :-)

On 07/07/2021 22:16, Jason Thorpe wrote:

If you already have separate TLBs for the I-stream and D-stream, that's really half the battle.  For PDP-11 user-space compatibility mode, you could simply hard-wire VA<16> to 1 for instruction fetches and put the I-space mappings in that portion of the user address space.

-- thorpej

I've lost track of whether this is VAX + (PDP-11++) or VAX-64 + (PDP-11++) but either way, if you aren't backwards compatible with the existing VAX SRM, then you'll have to fix up a lot of software. Although if there's no MMU, that does have the advantage of cutting down on the amount of software that would need to be fixed up :-)

If the existing design if a CVAX-alike then that's probably a better starting point than (say) a VAX-11/780, as there are probably fewer architectural quirks that would need to be replicated. There was a set of waivers maintained internally for various systems and chips, so getting hold of that might be a good idea. (I never had access to that list, sadly).

Has anyone added XPA/XVA to the backlog yet ... ?


Antonio Carlini

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