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Re: New vax - implementation :-)
Den 2021-07-03 kl. 14:50, skrev Rhialto:
On Sat 03 Jul 2021 at 13:14:46 +0200, Anders Magnusson wrote:
All of these steps are (mostly) independent of each other, therefore they
can easily be pipelined.
Until you get to instructions with modify a register in one operand and
use it again in another :) such as (ok I took those examples from the
PDP-11 architecture handbook in the section where it describes how
different models do different things; but for a VAX you'd have to be
careful too and with 6 operands the number of combinations is much worse)
Thought of this already :-)
The register value is modified in the ADDTO state, and at the same time
saved in a "restore" register in case a page fault or something happens
later on that requires rollback. The restore register follows in the
If two (or more) arguments uses the same register there are two ways of
dealing with it (I haven't decided which to use yet):
- Stall the pipeline one step to catch up with the new reg value
- Have a check whether the result from the parallell pipeline uses the
same reg and directly fetch the result.
I am leaning on the first way of doing it, since it will be quite
uncommon, and one pipe step is cheap.
E.g. instructions like ADDL3 (r0)+,(r0)+,(r0)+ are not especially common.
I have implemented it just like any other reg-reg move instruction (or,
actually, it's an add :-)
ADD Rx,(Rx)+ ; Rx gets incremented or not before being
ADD Rx,@-(Rx) ; used as a source operand
MOV PC,offset(Rx) ; value of PC either before or after fetching
; offset from the instruction stream
JMP (Rx)+ ; Rx gets incremented or not before being
; copied to PC
and JMP is weird because it's more like a LEA arg,PC, if there were a
Load Effective Address instruction.
JMP ab,rl#0,wl#pc lbl=add wback
35 of the instructions use the same primitive (add). For example; if we
ADDL2 rl,ml lbl=add setnz setc setv wback
INCL ml,rl#1 lbl=add setnz setc setv wback
It's the same, but INCL has a fake 1 as second argument.
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