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New vax - implementation :-)


here is a brief description of how I found that an efficient implementation of the vax on a FPGA could be. I haven't done it myself due to time/space/knowledge constraints, but let's consider this as some sort of documentation of future directions :-)

A vax has 288 (iirc) instructions, 21 addressing modes, 9 data types (except for strings) and each instruction can have 0-6 arguments.
This sounds like a giant matrix, so I broke it down into some pieces.

- First state is FETCH, to get the instruction into the stream.

- Then DECODE, which looks how many arguments and of which type, and if they are faked.  Here page faults in the instruction stream happens as well.  The whole part of the instruction should be available after this state.

- All arguments can be thought of as "load" instructions, and handled in 4 states.  I call them BWL, ADDTO, INDIR and READ.     - BWL saves a (sign-extended) value read from the instruction stream or based on the arg size.
    - ADDTO adds the BWL value to the given register
    - INDIR does a memory reference (if necessary) and result is OA.
    - READ does a memory reference as well, if the argument is of type R or M. Result is in OP.

- Then a PREEXEC state (to get the args correct) and EXECUTE state which do the evaluation.  These states can be looped (for instructions that do multiple things, like AOBLEQ or INSQUE), but for most instructions it is just one step.

- The last state is ENDINST.  It will check if any exceptions happened, write back the result(s), and check for interrupts.

All of these steps are (mostly) independent of each other, therefore they can easily be pipelined. And, since the arguments can be evaluated in parallell, an instruction will always have 9 states (except for the multi-instructions).

This gives us an architecture that can be both superscalar and superpipelined (just like the Alpha :-) )

A bonus point: Evaluating the args in parallell opens for evaluating "fake" arguments, so that part of an instruction can be finished before it's main part is executed :-)  For example;  here is from the instruction "microcode" I written:

JSB     ab,rl#pc,wl#pc,wl#-(sp)       lbl=mov move2 wback wback2

The JSB instruction does multiple things; it fetches the PC, pushes it to the stack, fetches an argument, evaluates it as an address, and writes to the PC. In the definition above, argument 1 is an address read from the input stream, arg2 is a fake read of the PC register, arg3 is a fake setup to write to PC and arg4 is a fake push onto the stack, so the only execution needed is to move the values to their coresponding destination and write them.

So, this is pretty much it.   Writing a vax that runs with a few hundred megahertz on some cheap demo board seems quite simple :-)

-- Ragge

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