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Re: Allwinner D1
> On Oct 12, 2025, at 6:41 PM, Rui-Xiang Guo <rxg%lavabit.com@localhost> wrote:
>
>> Made a bunch of progress on these. I think I have the MMC, Watchdog, and SRAM controller (needed to use the emac) figured out. The system locked up when I attempted to attach ohci (looks like on the first register write .. clock problem, maybe, although it uses the clock controller that we have a driver for), I?ll skip it for now and investigate more later.
>
> Yes, the ohci clock was not implemented yet. :)
Well, it certainly looks implemented now (the clock parent for ehci and ohci is clock-controller@2001000, which is "allwinner,sun20i-d1-ccu”, which is sun20i_d1_ccu.c, it looks like it has everything needed, although I suppose it certainly possible that the clock/reset index constants used in the code doesn't match what the device tree is using; always a danger).
-- thorpej
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