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Re: ibm4xx pci (Re: IBM405GP/GPr OPB bus_space endian (powerpc/ibm4xx/dev/opb.c))



On Tue, May 16, 2006 at 12:23:17AM +0900, Shigeyuki Fukushima wrote:
> With a quick glance of datasheets, perhaps we can use a common
> pci implementaion for other 405xx and 440xx (having PCI 2.2 in
> the processor).
> I don't know the details about PCI-X (in the processor).
> We may develop another driver for PCI-X Host-Bridge, ok?

The main issues that I think show up for 440xx are:

        1) Larger physical address space--PCI{-X,e} show up
           above the 4GB address (different for most 440
           variants).

        2) Multiple busses.  The 440SP has 3 PCI-X busses.  I
           think the 440SPe has one PCI-X and 3 PCIe busses.

I think it makes sense to have a plbpci node to which the PCI busses
are attached.  I'm not sure the best way to make that sharable
across all platforms and still generate space-efficient code for
individual platforms.  For most 405xx, we really don't want any
code that is not useful.  I think we generate too much code now.

-allen

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