Re: Problems with registers save/restore on context switch?

[David Brownlee <abs%netbsd.org@localhost>]

On 27 December 2013 16:45, Donald Lee <MacPPC2%c.icompute.com@localhost> wrote:
>>
>>(My powerpc skills could probably be listed on the back of a 601 die,
>>but some random comments below)
>
> ;->
>
>>There are not many MPC7400 vs MPC7447A differences in
>>sys/arch/powerpc/oea/cpu_subr.c
>>
>>There is one 7447A section with the comment /* Enable the 7450 branch
>>caches */ which also has /* Disable BTIC on 7450 Rev 2.0 or earlier */
>>- I'm pretty sure its irrelevant, but disabling it would be easy to
>>test.
>
> Tell me how, and I'll do it.

Around line 538 of sys/arch/powerpc/oea/cpu_subr.c has

                if (vers == MPC7450 && (pvr & 0xFFFF) <= 0x0200)
                        hid0 &= ~HID0_BTIC;

Build a kernel with the if test commented out (but not the hid0 &= ~...)

                /* XXX TESTING if (vers == MPC7450 && (pvr & 0xFFFF)
<= 0x0200) */
                        hid0 &= ~HID0_BTIC;

>>The "oea_startup: failed to allocate DEAD ZONE" code has a comment
>>which indicates it is harmless, but another difference between the two
>>is the amount of memory - would it be possible to test them both with
>>the same (lower) amount of memory, such as 512M?
>
> Unfortunately, one of the "test" machines is a production machine, so
> that would be..... inconvenient.
>
> I'll see if I have another machine around that fails that I can
> mess with.
>
>>The 7440 cache is reported as write back, while the 7447A is not,
>>though I suspect that may just be a reporting inconsistency.
>>
>>The 7440 L2 cache is supposed to be 2-way set associative vs 8-way set
>>associative for the 7447A - I don't see any differences in the
>>handling code, though I don't know if that is significant...
>
> -dgl-