Re: Problems with registers save/restore on context switch?

[Donald Lee <MacPPC2%c.icompute.com@localhost>]

At 7:32 AM +0400 12/18/13, Valery Ushakov wrote:
>On Tue, Dec 17, 2013 at 23:18:51 +0400, Valery Ushakov wrote:
>
>> Attached program converts time_t t = 1; with gmtime_r(3) in a loop and
>> checks tm_year of the result, expecting 70.  Sometimes (rarely) it
>> will see bogus results.
>
>*sigh* Really attached this time, hopefully :)
>
>-uwe
>
>Attachment converted: Quantum18G:lttest.c (TEXT/R*ch)



Fails here too.  My output below:

-dgl-

---output----
mercy$ make
cc -c lttest.c
cc -o lttest lttest.o
mercy$ time lttest
2038-01-19T03:14:08
2038-01-19T03:14:08
2038-01-19T03:14:08
2038-01-19T03:14:08
2038-01-19T03:14:08
2038-01-19T03:14:08
2038-01-19T03:14:08
   43.21s real    42.99s user     0.01s system
mercy$ cat lttest.c
#include <stdio.h>
#include <string.h>
#include <time.h>


int
main(int argc, char **argv)
{
    struct tm tm;
    time_t t;
    int i;

    t = 1;

    tzset();
    for (i = 0; i < 100000000; ++i) {
        struct tm *tmp;
        tmp = gmtime_r(&t, &tm);
        if (tmp == NULL) {
            perror("localtime");
            continue;
        }

        if (tm.tm_year != 70) {
            printf("%04d-%02d-%02dT%02d:%02d:%02d\n",
                   1900 + tm.tm_year, tm.tm_mon + 1, tm.tm_mday,
                   tm.tm_hour, tm.tm_min, tm.tm_sec);
        }
    }

    return 0;
}


mercy$ uname -a
NetBSD mercy 6.0.2 NetBSD 6.0.2 (GENERIC) macppc
mercy$ 

(dmesg excerpt)
NetBSD 6.0.2 (GENERIC)
total memory = 1024 MB
oea_startup: failed to allocate DEAD ZONE: error=12
avail memory = 982 MB
timecounter: Timecounters tick every 10.000 msec
found openpic PIC at 80040000
OpenPIC Version 1.2: Supports 4 CPUs and 64 interrupt sources.
bootpath: /pci@f4000000/ata-6@d/disk@0:0/netbsd
mainbus0 (root)
cpu0 at mainbus0: 7447A (Revision 1.2), ID 0 (primary)
cpu0: HID0 0x84d0c1bc<EMCP,EICE,DOZE,NAP,DPM,ICE,DCE,IFEM,SGE,BTIC,FBIOB,ABE,BH
T>, powersave: 1
cpu0: 1250.00 MHz, 512KB L2 cache no parity parity enabled
memory0 at mainbus0: len=128
spdmem0 at memory0
spdmem0: DDR SDRAM, no parity or ECC, 1GB, 400MHz (PC-3200)
spdmem0: 13 rows, 11 cols, 2 ranks, 4 banks/chip, 5.0ns cycle time
spdmem0: tAA-tRCD-tRP-tRAS: 2-3-3-8
spdmem0: voltage SSTL 2.5V, refresh time 7.8us (self-refreshing)