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Re: [PATCH] Incorrect segment 0 initialization for PMAC G5



On Apr 1, 2013, at 3:04 PM, Nathan Whitehorn <whitehorn%wisc.edu@localhost> 
wrote:

> On 04/01/13 16:09, Matt Thomas wrote:
>> On Apr 1, 2013, at 8:25 AM, Phileas Fogg <phileas-fogg%mail.ru@localhost> 
>> wrote:
>> 
>>> On 03/31/2013 02:01 PM, Michael wrote:
>>>> Hello,
>>>> 
>>>> On Sun, 31 Mar 2013 09:56:45 +0200
>>>> Phileas Fogg <phileas-fogg%mail.ru@localhost> wrote:
>>>> 
>>>>> On 03/31/2013 03:12 AM, Michael wrote:
>>>>> 
>>>>> 
>>>>>> Patches please! ;)
>>>>>> 
>>>>> Will do, first i wanted to get interrupts working else the system is
>>>>> pretty unusable. At least Ethernet should work properly and then we
>>>>> could SSH to it :)
>>>> I wrote most of the interrupt code, I have a G5 I want to get going and
>>>> you just removed the obstacle that kept me from doing so ;)
>>>> 
>>> Hi Michael,
>>> 
>>> i prepared the first bunch of patches for G5 support.
>>> These patches fix MMU issues on G5.
>>> I tested the patches with NetBSD HEAD.
>>> Please review them and tell me if it's OK.
>>> After applying these patches your NetBSD kernel should boot in virtual
>>> mode and panic in init_interrupt. All patches were tested by me
>>> with netbooting.
>>> 
>>> Patch description
>>> ------------------
>>> 
>>> POWERMAC_G5_11_2.patch   :  My kernel config which i used
>>> 
>>> locore.S.patch           :  Enable 64bit bridge mode at boot
>> Do we really want to turn off 64-bit instructions?
>> Probably only want to do for 64BIT BRIDGE and clear ISF in MSR
>> 
>>> trap_subr.S.patch        :  Enable 64bit bridge mode when entering an
>>>                            exception handler
>> Is this really needed?  Just make sure ISF (bit 2 in MSR is clear).
> 
> PPC970 doesn't have ISF. You need to do it by hand.

Oh well.  We probably should set it regardless in locore.S
for PPC_OEA64.  It'll be ignored if it isn't supported.



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