Re: Raspberry Pi 3B: /dev/mem mmap GPIO works on earmv7hf but notonaarch64

[Izumi Tsutsui <tsutsui%ceres.dti.ne.jp@localhost>]

> Driving a 8-bit bus at 2MHz will be hard with any abstraction between
> your software and the GPIOs, even with a GPIOACCESS32 (unless
> you only need to write new values at a much much lower rate than 2MHz)
> 
> In my opinion, the cleanest way would be to write a kernel module
> specifically for this application so you can mmio as you like.
> You might want to deactivate the other gpio driver in your config/dtb though.

I think there is a misunderstanding.

- I am not driving an 8-bit bus at 2MHz in software.
- The 2MHz is the PSG master clock generated by BCM283x GPCLK0
  (clock manager), not by toggling a GPIO pin.
- GPIOACCESS32 is not the point here (I'd like to know if there is any OS
  that bother to provide a kernel driver / module for a SoC specific clock
  generator).

The actual PSG register writes happen at a much lower rate
(2ms tick, with a small number of MMIO writes per tick).

This has been working on evbarm/earmv7hf + RPi3B, but the same approach
breaks on evbarm/aarch64. That difference is what I want to confirm:
is peripheral MMIO via /dev/mem intentionally unsupported on aarch64,
or is this a missing/incorrect mapping attribute issue?

For reference, my working earmv7hf implementation is here:
 https://github.com/tsutsui/rpi-psgplayer/blob/c238913f/psg_backend_rpi_gpio.c

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Izumi Tsutsui