re: [2/2 ABI and toolchain part] Support Raspberry Pi [0-3] in big-endian mode

[matthew green <mrg%eterna.com.au@localhost>]

> Oops, it was wrong. ARM ARM "ARMv7-A and ARMv7-R edition", or, more
> concisely, their web page says swp{,b} instructions on ARMv7 work for
> MP system:
>
> https://developer.arm.com/documentation/dht0008/a/swp-and-swpb/legacy-synchronization-instructions/limitations-of-swp-and-swpb
>
> | Limitations of SWP and SWPB
> | ...
> | In a multi-core system, preventing access to main memory for all
> | processors for the duration of a swap instruction can reduce
> | overall system performance.
> | ...
>
> So, I guess that mrg@ disabled swp{,b} for MULTIPROCESSOR not because
> instructions their-selves do not work, but because there are other
> problems for ARMv5 userland on MP environment. As Robert suggested in
> his previous message, multi-threaded applications for ARMv5 do not
> work on MP system. See port-arm/55704 by myself:
>
> http://gnats.netbsd.org/55704
>
> Matthew, is this reason why you disabled them for MP kernel?

the above link and info aren't the full story.

swp and swpb are only guaranteed to work properly on the
same CPU they execute on, not all CPUs, for armv7.  they
reply upon features not required.  eg, see:

https://developer.arm.com/documentation/ddi0406/cb/Application-Level-Architecture/Instruction-Details/Alphabetical-list-of-instructions/SWP--SWPB?lang=en

which says:

The SWP and SWPB instructions rely on the properties of
the system beyond the processor to ensure that no stores
from other observers can occur between the load access and
the store access, and this might not be implemented for
all regions of memory on some system implementations. In
all cases, SWP and SWPB do ensure that no stores from the
processor that executed the SWP or SWPB instruction can
occur between the load access and the store access of the
SWP or SWPB.

ie, the quoted text above doesn't mention that the support
for doing this isn't required.  there ares also bits in
ID_ISAR0 and ID_ISAR4 to show this.


there's another document on arm.com i can't find right now
that is more explicit.

but i found this post as well:

https://community.arm.com/developer/ip-products/processors/b/processors-ip-blog/posts/locks-swps-and-two-smoking-barriers


AFAICT, we need real emulation in both arm32 and arm64,
and for it to be used by default on armv6 and newer.


.mrg.