Re: trouble with netbsd-8 on RPI3?

[Robert Swindells <rjs%fdy2.co.uk@localhost>]

Greg Troxel <gdt%lexort.com@localhost> wrote:
>Robert Swindells <rjs%fdy2.co.uk@localhost> writes:
>
>> I have seen a similar error when trying to run an earmv4 userland with
>> an earmv7hf kernel. I was trying to build some earmv4 packages on a
>> faster machine.
>>
>> I fixed it by setting the CPU control flag to enable the deprecated SWP
>> instruction.
>
>Interesting, but I'm pretty sure that's not it.

Why are you sure ?

You could enable the code in src/sys/arch/arm/arm/undefined.c to print
out which instruction is causing the fault:

--- undefined.c.orig    2020-05-15 20:23:21.862910625 +0100
+++ undefined.c 2020-05-15 20:23:54.263380522 +0100
@@ -434,7 +434,7 @@
                /* Fault has not been handled */
                ksiginfo_t ksi;
 
-#ifdef VERBOSE_ARM32
+/*#ifdef VERBOSE_ARM32*/
                s = spltty();
 
                if ((fault_instruction & 0x0f000010) == 0x0e000000) {
@@ -453,7 +453,7 @@
                }
 
                splx(s);
-#endif
+/*#endif*/
 
                if ((fault_code & FAULT_USER) == 0) {
 #ifdef DDB


Or try this patch to src/sys/arch/arm/arm/cpufunc.c to enable SWP:

--- cpufunc.c.orig      2020-05-15 20:16:55.760999299 +0100
+++ cpufunc.c   2020-05-15 20:18:49.590353040 +0100
@@ -3145,7 +3145,7 @@
 {
 
        int cpuctrl = CPU_CONTROL_MMU_ENABLE | CPU_CONTROL_IC_ENABLE
-           | CPU_CONTROL_DC_ENABLE | CPU_CONTROL_BPRD_ENABLE
+           | CPU_CONTROL_DC_ENABLE | CPU_CONTROL_SWP_ENABLE | CPU_CONTROL_BPRD_ENABLE
 #ifdef __ARMEB__
            | CPU_CONTROL_EX_BEND
 #endif