Re: Cortex A9 private timer

[Robert Swindells <rjs%fdy2.co.uk@localhost>]

Aymeric Vincent <aymericvincent%free.fr@localhost> wrote:
>the addition of a9ptmr support breaks at least the DE0 Nano SoC port
>(Cortex A9) because both a9tmr and a9ptmr are enabled. The kernel hangs
>during boot in what looks like an interrupt storm but I didn't
>investigate much. A workaround for me is to disable a9ptmr in the dtb
>but I fail to see the intent of making a private timer the one
>reponsible for calling hardclock().
>
>So far, we had a9tmr on Cortex A5/A9 and gtmr on other Cortex. They both
>call hardclock() and don't collide because no SoC can provide both so
>only one will attach at runtime.
>
>I see that the meson platform mandates the use of a9ptmr_delay, so there
>is certainly a reason for this support but it breaks other ports and was
>pulled up to netbsd-9 very quickly... :-/ May I ask for a little
>explanation?

Not sure it works on meson either.

My odroid-c2 locks up early in boot.