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Re: Marvell if_mvgbe



Hello, Robert.

(2012/10/12 21:42), Robert Swindells wrote:
> I have been using the following patch for a while now on the
> SheevaPlug, it should reduce the number of receive interrupts
> generated by the ethernet controllers.
> 
> It would be good if somebody could test it on Orion and MV7[68]xxx
> hardware.
> 
> I don't have documentation on Discovery or other Orion variants.
> 
> Robert Swindells

 Thank you for the patch.

 I've tested with SheevaPlug and it was no problem though I don't know
the setting value is reasonable or not :-)

 I hope Kiyohara would test with his Discovery and Orion variants.

 Thanks.



> Index: if_mvgbe.c
> ===================================================================
> RCS file: /cvsroot/src/sys/dev/marvell/if_mvgbe.c,v
> retrieving revision 1.23
> diff -u -r1.23 if_mvgbe.c
> --- if_mvgbe.c        12 Oct 2012 10:38:06 -0000      1.23
> +++ if_mvgbe.c        12 Oct 2012 12:43:11 -0000
> @@ -206,6 +206,7 @@
>       struct mvgbe_ring_data *sc_rdata;
>       bus_dmamap_t sc_ring_map;
>       int sc_if_flags;
> +     int sc_ipg_rx;
>       int sc_wdogsoft;
>  
>       LIST_HEAD(__mvgbe_jfreehead, mvgbe_jpool_entry) sc_jfree_listhead;
> @@ -263,6 +264,7 @@
>  #ifdef MVGBE_DEBUG
>  static void mvgbe_dump_txdesc(struct mvgbe_tx_desc *, int);
>  #endif
> +static uint32_t mvgbe_ipg_rx(struct mvgbec_softc *, struct mvgbe_softc *);
>  
>  CFATTACH_DECL_NEW(mvgbec_gt, sizeof(struct mvgbec_softc),
>      mvgbec_match, mvgbec_attach, NULL, NULL);
> @@ -282,6 +284,8 @@
>       int flags;
>  #define FLAGS_FIX_TQTB       (1 << 0)
>  #define FLAGS_FIX_MTU        (1 << 1)
> +#define      FLAGS_IPG1      (1 << 2)
> +#define      FLAGS_IPG2      (1 << 3)
>  } mvgbe_ports[] = {
>       { MARVELL_DISCOVERY_II,         0, 3, { 32, 33, 34 }, 0 },
>       { MARVELL_DISCOVERY_III,        0, 3, { 32, 33, 34 }, 0 },
> @@ -292,26 +296,26 @@
>  #endif
>       { MARVELL_ORION_1_88F5082,      0, 1, { 21 }, FLAGS_FIX_MTU },
>       { MARVELL_ORION_1_88F5180N,     0, 1, { 21 }, FLAGS_FIX_MTU },
> -     { MARVELL_ORION_1_88F5181,      0, 1, { 21 }, FLAGS_FIX_MTU },
> -     { MARVELL_ORION_1_88F5182,      0, 1, { 21 }, FLAGS_FIX_MTU },
> -     { MARVELL_ORION_2_88F5281,      0, 1, { 21 }, FLAGS_FIX_MTU },
> +     { MARVELL_ORION_1_88F5181,      0, 1, { 21 }, FLAGS_FIX_MTU | 
> FLAGS_IPG1 },
> +     { MARVELL_ORION_1_88F5182,      0, 1, { 21 }, FLAGS_FIX_MTU | 
> FLAGS_IPG1 },
> +     { MARVELL_ORION_2_88F5281,      0, 1, { 21 }, FLAGS_FIX_MTU | 
> FLAGS_IPG1 },
>       { MARVELL_ORION_1_88F6082,      0, 1, { 21 }, FLAGS_FIX_MTU },
>       { MARVELL_ORION_1_88W8660,      0, 1, { 21 }, FLAGS_FIX_MTU },
>  
> -     { MARVELL_KIRKWOOD_88F6180,     0, 1, { 11 }, FLAGS_FIX_TQTB },
> -     { MARVELL_KIRKWOOD_88F6192,     0, 1, { 11 }, FLAGS_FIX_TQTB },
> -     { MARVELL_KIRKWOOD_88F6192,     1, 1, { 15 }, FLAGS_FIX_TQTB },
> -     { MARVELL_KIRKWOOD_88F6281,     0, 1, { 11 }, FLAGS_FIX_TQTB },
> -     { MARVELL_KIRKWOOD_88F6281,     1, 1, { 15 }, FLAGS_FIX_TQTB },
> -     { MARVELL_KIRKWOOD_88F6282,     0, 1, { 11 }, FLAGS_FIX_TQTB },
> -     { MARVELL_KIRKWOOD_88F6282,     1, 1, { 15 }, FLAGS_FIX_TQTB },
> -
> -     { MARVELL_MV78XX0_MV78100,      0, 1, { 40 }, FLAGS_FIX_TQTB },
> -     { MARVELL_MV78XX0_MV78100,      1, 1, { 44 }, FLAGS_FIX_TQTB },
> -     { MARVELL_MV78XX0_MV78200,      0, 1, { 40 }, FLAGS_FIX_TQTB },
> -     { MARVELL_MV78XX0_MV78200,      1, 1, { 44 }, FLAGS_FIX_TQTB },
> -     { MARVELL_MV78XX0_MV78200,      2, 1, { 48 }, FLAGS_FIX_TQTB },
> -     { MARVELL_MV78XX0_MV78200,      3, 1, { 52 }, FLAGS_FIX_TQTB },
> +     { MARVELL_KIRKWOOD_88F6180,     0, 1, { 11 }, FLAGS_FIX_TQTB | 
> FLAGS_IPG2 },
> +     { MARVELL_KIRKWOOD_88F6192,     0, 1, { 11 }, FLAGS_FIX_TQTB | 
> FLAGS_IPG2 },
> +     { MARVELL_KIRKWOOD_88F6192,     1, 1, { 15 }, FLAGS_FIX_TQTB | 
> FLAGS_IPG2 },
> +     { MARVELL_KIRKWOOD_88F6281,     0, 1, { 11 }, FLAGS_FIX_TQTB | 
> FLAGS_IPG2 },
> +     { MARVELL_KIRKWOOD_88F6281,     1, 1, { 15 }, FLAGS_FIX_TQTB | 
> FLAGS_IPG2 },
> +     { MARVELL_KIRKWOOD_88F6282,     0, 1, { 11 }, FLAGS_FIX_TQTB | 
> FLAGS_IPG2 },
> +     { MARVELL_KIRKWOOD_88F6282,     1, 1, { 15 }, FLAGS_FIX_TQTB | 
> FLAGS_IPG2 },
> +
> +     { MARVELL_MV78XX0_MV78100,      0, 1, { 40 }, FLAGS_FIX_TQTB | 
> FLAGS_IPG2 },
> +     { MARVELL_MV78XX0_MV78100,      1, 1, { 44 }, FLAGS_FIX_TQTB | 
> FLAGS_IPG2 },
> +     { MARVELL_MV78XX0_MV78200,      0, 1, { 40 }, FLAGS_FIX_TQTB | 
> FLAGS_IPG2 },
> +     { MARVELL_MV78XX0_MV78200,      1, 1, { 44 }, FLAGS_FIX_TQTB | 
> FLAGS_IPG2 },
> +     { MARVELL_MV78XX0_MV78200,      2, 1, { 48 }, FLAGS_FIX_TQTB | 
> FLAGS_IPG2 },
> +     { MARVELL_MV78XX0_MV78200,      3, 1, { 52 }, FLAGS_FIX_TQTB | 
> FLAGS_IPG2 },
>  };
>  
>  
> @@ -801,6 +805,18 @@
>       return;
>  }
>  
> +static uint32_t
> +mvgbe_ipg_rx(struct mvgbec_softc *csc, struct mvgbe_softc *sc)
> +{
> +
> +     if (csc->sc_flags & FLAGS_IPG2)
> +             return (((sc->sc_ipg_rx & 0x8000) << 10) |
> +                     ((sc->sc_ipg_rx & 0x7fff) << 7));
> +     else if (csc->sc_flags & FLAGS_IPG1)
> +             return ((sc->sc_ipg_rx & 0x3fff) << 8);
> +     else
> +             return 0;
> +}
>  
>  static int
>  mvgbe_intr(void *arg)
> @@ -974,6 +990,8 @@
>               return ENOBUFS;
>       }
>  
> +     if ((csc->sc_flags & FLAGS_IPG1) || (csc->sc_flags & FLAGS_IPG2))
> +             sc->sc_ipg_rx = 768;
>       if (csc->sc_flags & FLAGS_FIX_MTU)
>               MVGBE_WRITE(sc, MVGBE_MTU, 0);  /* hw reset value is wrong */
>       MVGBE_WRITE(sc, MVGBE_PSC,
> @@ -1013,6 +1031,7 @@
>       MVGBE_WRITE(sc, MVGBE_PXC, MVGBE_PXC_RXCS);
>       MVGBE_WRITE(sc, MVGBE_PXCX, 0);
>       MVGBE_WRITE(sc, MVGBE_SDC,
> +         mvgbe_ipg_rx(csc, sc) |
>           MVGBE_SDC_RXBSZ_16_64BITWORDS |
>  #if BYTE_ORDER == LITTLE_ENDIAN
>           MVGBE_SDC_BLMR |    /* Big/Little Endian Receive Mode: No swap */
> 


-- 
-----------------------------------------------
                SAITOH Masanobu (msaitoh%execsw.org@localhost
                                 msaitoh%netbsd.org@localhost)


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