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patch to add pxa2x0_i2c_bootstrap
I use this function in my board-specific startup.
Index: sys/arch/arm/xscale/pxa2x0_i2c.c
===================================================================
--- sys/arch/arm/xscale/pxa2x0_i2c.c (revision 4)
+++ sys/arch/arm/xscale/pxa2x0_i2c.c (revision 30)
@@ -33,18 +33,56 @@
#define I2C_RETRY_COUNT 10
+static vaddr_t pxai2c_regs;
+#define I2C_BOOTSTRAP_REG(reg) \
+ (*((volatile u_int32_t *)(pxai2c_regs + (reg))))
+
+
+void pxa2x0_i2c_bootstrap(vaddr_t i2c_regs)
+{
+ pxai2c_regs = i2c_regs;
+}
+
+static inline u_int32_t
+pxai2c_reg_read(struct pxa2x0_i2c_softc *sc, int reg)
+{
+ if (__predict_true(sc != NULL))
+ return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, reg));
+ else
+ if (pxai2c_regs)
+ return (I2C_BOOTSTRAP_REG(reg));
+ panic("pxai2c_reg_read: not bootstrapped");
+}
+
+static inline void
+ pxai2c_reg_write(struct pxa2x0_i2c_softc *sc, int reg,
u_int32_t val)
+{
+ if (__predict_true(sc != NULL))
+ bus_space_write_4(sc->sc_iot, sc->sc_ioh, reg, val);
+ else
+ if (pxai2c_regs)
+ I2C_BOOTSTRAP_REG(reg) = val;
+ else
+ panic("pxai2c_reg_write: not bootstrapped");
+ return;
+}
+
int
pxa2x0_i2c_attach_sub(struct pxa2x0_i2c_softc *sc)
{
-
- if (bus_space_map(sc->sc_iot, PXA2X0_I2C_BASE,
- PXA2X0_I2C_SIZE, 0, &sc->sc_ioh)) {
- sc->sc_size = 0;
- return EIO;
+ if (NULL != sc)
+ {
+ if (bus_space_map(sc->sc_iot, PXA2X0_I2C_BASE,
+ PXA2X0_I2C_SIZE, 0, &sc->sc_ioh)) {
+ sc->sc_size = 0;
+ return EIO;
+ }
+
+ pxai2c_regs = (vaddr_t)bus_space_vaddr(sc->sc_iot,
sc->sc_ioh);
+
+ bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0,
sc->sc_size,
+
BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
}
- bus_space_barrier(sc->sc_iot, sc->sc_ioh, 0, sc->sc_size,
- BUS_SPACE_BARRIER_READ|BUS_SPACE_BARRIER_WRITE);
-
pxa2x0_i2c_init(sc);
return 0;
@@ -54,7 +92,7 @@
pxa2x0_i2c_detach_sub(struct pxa2x0_i2c_softc *sc)
{
- if (sc->sc_size) {
+ if (NULL != sc && sc->sc_size) {
bus_space_unmap(sc->sc_iot, sc->sc_ioh, sc->sc_size);
sc->sc_size = 0;
}
@@ -84,8 +122,8 @@
{
/* Reset and disable the standard I2C unit. */
- bus_space_write_4(sc->sc_iot, sc->sc_ioh, I2C_ICR, ICR_UR);
- bus_space_write_4(sc->sc_iot, sc->sc_ioh, I2C_ISAR, 0);
+ pxai2c_reg_write(sc, I2C_ICR, ICR_UR);
+ pxai2c_reg_write(sc, I2C_ISAR, 0);
delay(1);
pxa2x0_clkman_config(CKEN_I2C, 0);
}
@@ -93,60 +131,58 @@
int
pxa2x0_i2c_read(struct pxa2x0_i2c_softc *sc, u_char slave, u_char *valuep)
{
- bus_space_tag_t iot = sc->sc_iot;
- bus_space_handle_t ioh = sc->sc_ioh;
int timeout;
int tries = I2C_RETRY_COUNT;
uint32_t rv;
retry:
- bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR);
- bus_space_write_4(iot, ioh, I2C_ISAR, 0x00);
- bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE | ISR_IRF);
+ pxai2c_reg_write(sc, I2C_ICR, ICR_UR);
+ pxai2c_reg_write(sc, I2C_ISAR, 0x00);
+ pxai2c_reg_write(sc, I2C_ISR, ISR_ITE | ISR_IRF);
delay(1);
- bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_SCLE);
+ pxai2c_reg_write(sc, I2C_ICR, ICR_IUE | ICR_SCLE);
/* Write slave device address. */
- bus_space_write_4(iot, ioh, I2C_IDBR, (slave<<1) | 0x1);
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_START);
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_STOP);
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB);
+ pxai2c_reg_write(sc, I2C_IDBR, (slave<<1) | 0x1);
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv | ICR_START);
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv & ~ICR_STOP);
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv | ICR_TB);
timeout = 10000;
- while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ITE) == 0) {
+ while ((pxai2c_reg_read(sc, I2C_ISR) & ISR_ITE) == 0) {
if (timeout-- == 0)
goto err;
delay(1);
}
- bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE);
+ pxai2c_reg_write(sc, I2C_ISR, ISR_ITE);
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_START);
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv & ~ICR_START);
/* Read data value. */
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv |
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv |
(ICR_STOP | ICR_ACKNAK));
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB);
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv | ICR_TB);
timeout = 10000;
- while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_IRF) == 0) {
+ while ((pxai2c_reg_read(sc, I2C_ISR) & ISR_IRF) == 0) {
if (timeout-- == 0)
goto err;
delay(1);
}
- bus_space_write_4(iot, ioh, I2C_ISR, ISR_IRF);
+ pxai2c_reg_write(sc, I2C_ISR, ISR_IRF);
- rv = bus_space_read_4(iot, ioh, I2C_IDBR);
+ rv = pxai2c_reg_read(sc, I2C_IDBR);
*valuep = (u_char)rv;
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv & ~(ICR_STOP | ICR_ACKNAK));
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv & ~(ICR_STOP | ICR_ACKNAK));
return 0;
@@ -154,10 +190,10 @@
if (tries-- >= 0)
goto retry;
- bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR);
- bus_space_write_4(iot, ioh, I2C_ISAR, 0x00);
- bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE | ISR_IRF);
- bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_SCLE);
+ pxai2c_reg_write(sc, I2C_ICR, ICR_UR);
+ pxai2c_reg_write(sc, I2C_ISAR, 0x00);
+ pxai2c_reg_write(sc, I2C_ISR, ISR_ITE | ISR_IRF);
+ pxai2c_reg_write(sc, I2C_ICR, ICR_IUE | ICR_SCLE);
return EIO;
}
@@ -165,61 +201,59 @@
int
pxa2x0_i2c_write(struct pxa2x0_i2c_softc *sc, u_char slave, u_char value)
{
- bus_space_tag_t iot = sc->sc_iot;
- bus_space_handle_t ioh = sc->sc_ioh;
int timeout;
int tries = I2C_RETRY_COUNT;
uint32_t rv;
retry:
- bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR);
- bus_space_write_4(iot, ioh, I2C_ISAR, 0x00);
- bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE);
+ pxai2c_reg_write(sc, I2C_ICR, ICR_UR);
+ pxai2c_reg_write(sc, I2C_ISAR, 0x00);
+ pxai2c_reg_write(sc, I2C_ISR, ISR_ITE);
delay(1);
- bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_SCLE);
+ pxai2c_reg_write(sc, I2C_ICR, ICR_IUE | ICR_SCLE);
/* Write slave device address. */
- bus_space_write_4(iot, ioh, I2C_IDBR, (slave<<1));
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_START);
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_STOP);
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB);
+ pxai2c_reg_write(sc, I2C_IDBR, (slave<<1));
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv | ICR_START);
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv & ~ICR_STOP);
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv | ICR_TB);
timeout = 10000;
- while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ITE) == 0) {
+ while ((pxai2c_reg_read(sc, I2C_ISR) & ISR_ITE) == 0) {
if (timeout-- == 0)
goto err;
delay(1);
}
- if ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ACKNAK) != 0)
+ if ((pxai2c_reg_read(sc, I2C_ISR) & ISR_ACKNAK) != 0)
goto err;
- bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE);
+ pxai2c_reg_write(sc, I2C_ISR, ISR_ITE);
/* Write data. */
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_START);
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_STOP);
- bus_space_write_4(iot, ioh, I2C_IDBR, value);
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB);
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv & ~ICR_START);
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv | ICR_STOP);
+ pxai2c_reg_write(sc, I2C_IDBR, value);
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv | ICR_TB);
timeout = 10000;
- while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ITE) == 0) {
+ while ((pxai2c_reg_read(sc, I2C_ISR) & ISR_ITE) == 0) {
if (timeout-- == 0)
goto err;
delay(1);
}
- if ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ACKNAK) != 0)
+ if ((pxai2c_reg_read(sc, I2C_ISR) & ISR_ACKNAK) != 0)
goto err;
- bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE);
+ pxai2c_reg_write(sc, I2C_ISR, ISR_ITE);
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_STOP);
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv & ~ICR_STOP);
return 0;
@@ -227,10 +261,10 @@
if (tries-- >= 0)
goto retry;
- bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR);
- bus_space_write_4(iot, ioh, I2C_ISAR, 0x00);
- bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE);
- bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_SCLE);
+ pxai2c_reg_write(sc, I2C_ICR, ICR_UR);
+ pxai2c_reg_write(sc, I2C_ISAR, 0x00);
+ pxai2c_reg_write(sc, I2C_ISR, ISR_ITE);
+ pxai2c_reg_write(sc, I2C_ICR, ICR_IUE | ICR_SCLE);
return EIO;
}
@@ -238,81 +272,79 @@
int
pxa2x0_i2c_write_2(struct pxa2x0_i2c_softc *sc, u_char slave, u_short value)
{
- bus_space_tag_t iot = sc->sc_iot;
- bus_space_handle_t ioh = sc->sc_ioh;
int timeout;
int tries = I2C_RETRY_COUNT;
uint32_t rv;
retry:
- bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR);
- bus_space_write_4(iot, ioh, I2C_ISAR, 0x00);
- bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE);
+ pxai2c_reg_write(sc, I2C_ICR, ICR_UR);
+ pxai2c_reg_write(sc, I2C_ISAR, 0x00);
+ pxai2c_reg_write(sc, I2C_ISR, ISR_ITE);
delay(1);
- bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_SCLE);
+ pxai2c_reg_write(sc, I2C_ICR, ICR_IUE | ICR_SCLE);
/* Write slave device address. */
- bus_space_write_4(iot, ioh, I2C_IDBR, (slave<<1));
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_START);
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_STOP);
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB);
+ pxai2c_reg_write(sc, I2C_IDBR, (slave<<1));
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv | ICR_START);
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv & ~ICR_STOP);
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv | ICR_TB);
timeout = 10000;
- while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ITE) == 0) {
+ while ((pxai2c_reg_read(sc, I2C_ISR) & ISR_ITE) == 0) {
if (timeout-- == 0)
goto err;
delay(1);
}
- if ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ACKNAK) != 0)
+ if ((pxai2c_reg_read(sc, I2C_ISR) & ISR_ACKNAK) != 0)
goto err;
- bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE);
+ pxai2c_reg_write(sc, I2C_ISR, ISR_ITE);
/* Write upper 8 bits of data. */
- bus_space_write_4(iot, ioh, I2C_IDBR, (value >> 8) & 0xff);
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_START);
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_STOP);
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB);
+ pxai2c_reg_write(sc, I2C_IDBR, (value >> 8) & 0xff);
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv & ~ICR_START);
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv & ~ICR_STOP);
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv | ICR_TB);
timeout = 10000;
- while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ITE) == 0) {
+ while ((pxai2c_reg_read(sc, I2C_ISR) & ISR_ITE) == 0) {
if (timeout-- == 0)
goto err;
delay(1);
}
- if ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ACKNAK) != 0)
+ if ((pxai2c_reg_read(sc, I2C_ISR) & ISR_ACKNAK) != 0)
goto err;
- bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE);
+ pxai2c_reg_write(sc, I2C_ISR, ISR_ITE);
/* Write lower 8 bits of data. */
- bus_space_write_4(iot, ioh, I2C_IDBR, value & 0xff);
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_START);
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_STOP);
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv | ICR_TB);
+ pxai2c_reg_write(sc, I2C_IDBR, value & 0xff);
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv & ~ICR_START);
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv | ICR_STOP);
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv | ICR_TB);
timeout = 10000;
- while ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ITE) == 0) {
+ while ((pxai2c_reg_read(sc, I2C_ISR) & ISR_ITE) == 0) {
if (timeout-- == 0)
goto err;
delay(1);
}
- if ((bus_space_read_4(iot, ioh, I2C_ISR) & ISR_ACKNAK) != 0)
+ if ((pxai2c_reg_read(sc, I2C_ISR) & ISR_ACKNAK) != 0)
goto err;
- bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE);
+ pxai2c_reg_write(sc, I2C_ISR, ISR_ITE);
- rv = bus_space_read_4(iot, ioh, I2C_ICR);
- bus_space_write_4(iot, ioh, I2C_ICR, rv & ~ICR_STOP);
+ rv = pxai2c_reg_read(sc, I2C_ICR);
+ pxai2c_reg_write(sc, I2C_ICR, rv & ~ICR_STOP);
return 0;
@@ -320,10 +352,10 @@
if (tries-- >= 0)
goto retry;
- bus_space_write_4(iot, ioh, I2C_ICR, ICR_UR);
- bus_space_write_4(iot, ioh, I2C_ISAR, 0x00);
- bus_space_write_4(iot, ioh, I2C_ISR, ISR_ITE);
- bus_space_write_4(iot, ioh, I2C_ICR, ICR_IUE | ICR_SCLE);
+ pxai2c_reg_write(sc, I2C_ICR, ICR_UR);
+ pxai2c_reg_write(sc, I2C_ISAR, 0x00);
+ pxai2c_reg_write(sc, I2C_ISR, ISR_ITE);
+ pxai2c_reg_write(sc, I2C_ICR, ICR_IUE | ICR_SCLE);
return EIO;
}
Index: sys/arch/arm/xscale/pxa2x0_i2c.h
===================================================================
--- sys/arch/arm/xscale/pxa2x0_i2c.h (revision 4)
+++ sys/arch/arm/xscale/pxa2x0_i2c.h (revision 30)
@@ -28,6 +28,7 @@
bus_space_handle_t sc_ioh;
bus_size_t sc_size;
};
+extern void pxa2x0_i2c_bootstrap(vaddr_t);
int pxa2x0_i2c_attach_sub(struct pxa2x0_i2c_softc *);
int pxa2x0_i2c_detach_sub(struct pxa2x0_i2c_softc *);
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