Re: Freescale i.mx31 on NetBSD

["Doug Brewer" <brewer.doug%gmail.com@localhost>]

Chris Gilbert wrote:
>
> Doug Brewer wrote:
>
> > Hello,
> >
> > I'm trying to running imx31ads on netbsd with matt's imx31 source,
> > but it seems to not work:
> >
> > RedBoot> go
> >
> > NetBSD/evbarm (imx31lk) booting ...
> > initarm: Configuring system ...
> > physmemory: 32768 pages at 0x80000000 -> 0x87ffffff
> > Allocating page tables
> > freestart = 0x800c0000, free_pages = 320 (0x00000140)
> > IRQ stack: p0x801f1000 v0x801f1000
> > ABT stack: p0x801f0000 v0x801f0000
> > UND stack: p0x801ef000 v0x801ef000
> > SVC stack: p0x801ed000 v0x801ed000
> > Creating L1 page table at p0x801fc000 v0x801fc000
> > Mapping kernel
> > initarm: etext 803d959b, _end 80474244
> > initarm: textsize 0x1e0000, totalsize 0x280000
> > pmap_map_chunk: pa=0x80200000 va=0x80200000 size=0x1e0000 resid=0x1e0000
> prot=01
> > SLLLLLLLLLLLLLL
> > pmap_map_chunk: pa=0x803e0000 va=0x803e0000 size=0xa0000 resid=0xa0000
> prot=0x31
> > LLLLLLLLLL
> > Constructing L2 page tables
> > pmap_map_chunk: pa=0x801f1000 va=0x801f1000 size=0x1000 resid=0x1000
> prot=0x3 c1
> > P
> > pmap_map_chunk: pa=0x801f0000 va=0x801f0000 size=0x1000 resid=0x1000
> prot=0x3 c1
> > ...
> > pmap_map_chunk: pa=0x801f6000 va=0x801f6000 size=0x1000 resid=0x1000
> prot=0x3 c2
> > P
> > pmap_map_chunk: pa=0x801f5000 va=0x801f5000 size=0x1000 resid=0x1000
> prot=0x3 c2
> > P
> > pmap_map_chunk: pa=0x801f4000 va=0x801f4000 size=0x1000 resid=0x1000
> prot=0x3 c2
> > P
> > pmap_map_chunk: pa=0x801f3000 va=0x801f3000 size=0x1000 resid=0x1000
> prot=0x3 c2
> > P
> > devmap: 43f00000 -> 43ffffff @ fd000000
> > pmap_map_chunk: pa=0x43f00000 va=0xfd000000 size=0x100000 resid=0x100000
> prot=00
> > S
> > freestart = 0x80475000, free_pages = 31627 (0x7b8b)
> > switching to new L1 page table  @0x801fc000...
> >
> > I also noticed that imx uart has not implemented yet or did I miss
> something?
> >
> > Thank you,
> > Doug.
> >
> >
>
>  It's worth checking you're enabling domain access before hitting the new L1
> table, eg from cats/cats_machdep.c
>        /*
>         * enable the system bit in the control register, otherwise we can't
>         * access the kernel after the switch to the new L1 table
>         * I suspect cyclone hid this problem, by enabling the ROM bit
>         * Note can not have both SYST and ROM enabled together, the results
>         * are "undefined"
>         */
>        cpu_control(CPU_CONTROL_SYST_ENABLE | CPU_CONTROL_ROM_ENABLE,
> CPU_CONTROL_SYST_ENABLE);
>  #ifdef VERBOSE_INIT_ARM
>        printf("switching domains\n");
>  #endif
>        /* be a client to all domains */
>        cpu_domains(0x55555555);
>        /* Switch tables */
>  #ifdef VERBOSE_INIT_ARM
>        printf("switching to new L1 page table\n");
>  #endif
>
>        setttb(kernel_l1pt.pv_pa);
>        cpu_tlb_flushID();
>        cpu_domains(DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL*2));
>
>  You may need to be a client of all domains, before the switch in case the
> bootloader is dropping you into a domain (although you're getting a printf,
> so probably isn't) but you definetly need to be a client of the kernel
> domain when you switch the L1 table.

Thanks for the tip. I added the line

cpu_control(CPU_CONTROL_SYST_ENABLE | CPU_CONTROL_ROM_ENABLE,
CPU_CONTROL_SYST_ENABLE);

in imx31lk_machdep.c, it boots succefully.
I think matt should add the line in machdep.c as well...

>  Chris

BR,
Doug.