Port-amd64 archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
Re: Areca 1200 rev. B not recognised?
Continuing my own investigation.
liman%cafax.se@localhost:
> Is there an obvious reason for this being the case? What am I missing?
> ... ... SuperMicro stupidities?
It strikes me that the arcmsr0 is the only thing that interrupts at
ioapic1 (one) where everything else interrupts at ioapic0 (zero).
; (keep-lines "ioapic" nil nil t)
> ioapic0 at mainbus0 apid 6: pa 0xfec00000, version 0x20, 24 pins
> ioapic1 at mainbus0 apid 7: pa 0xfec8a000, version 0x20, 24 pins
> arcmsr0: interrupting at ioapic1 pin 8
> uhci0: interrupting at ioapic0 pin 16
> uhci1: interrupting at ioapic0 pin 21
> uhci2: interrupting at ioapic0 pin 19
> ehci0: interrupting at ioapic0 pin 18
> uhci3: interrupting at ioapic0 pin 23
> uhci4: interrupting at ioapic0 pin 19
> uhci5: interrupting at ioapic0 pin 18
> ehci1: interrupting at ioapic0 pin 23
> piixide0: using ioapic0 pin 19 for native-PCI interrupt
> ichsmb0: interrupting at ioapic0 pin 18
> piixide1: using ioapic0 pin 19 for native-PCI interrupt
This could be related to the fact that the Areca board sits on a riser
card, with a sturdy IC (its heatsink covers its markings) on it. I
wonder if that riser card is the culprit. The lack of room prevents me
from mounting it directly on the MB, so I guess I will have to be
inventive somehow ... :-(
<goes back to the workshop with a frown ...> ;-)
Cheers,
/Liman
Home |
Main Index |
Thread Index |
Old Index