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[pkgsrc/trunk]: pkgsrc/lang/llvm llvm: add WebAssembly to LLVM_TARGETS



details:   https://anonhg.NetBSD.org/pkgsrc/rev/0ae4e815aed9
branches:  trunk
changeset: 396530:0ae4e815aed9
user:      adam <adam%pkgsrc.org@localhost>
date:      Sun Jun 02 09:48:29 2019 +0000

description:
llvm: add WebAssembly to LLVM_TARGETS

diffstat:

 lang/llvm/PLIST      |  10 ++++++++--
 lang/llvm/options.mk |   4 ++--
 2 files changed, 10 insertions(+), 4 deletions(-)

diffs (46 lines):

diff -r 8f5e543ca672 -r 0ae4e815aed9 lang/llvm/PLIST
--- a/lang/llvm/PLIST   Sun Jun 02 09:48:10 2019 +0000
+++ b/lang/llvm/PLIST   Sun Jun 02 09:48:29 2019 +0000
@@ -1,4 +1,4 @@
-@comment $NetBSD: PLIST,v 1.11 2019/06/02 08:35:55 adam Exp $
+@comment $NetBSD: PLIST,v 1.12 2019/06/02 09:48:29 adam Exp $
 bin/FileCheck
 bin/bugpoint
 bin/count
@@ -1545,6 +1545,12 @@
 lib/libLLVMTextAPI.a
 lib/libLLVMTransformUtils.a
 lib/libLLVMVectorize.a
+${PLIST.WebAssembly}lib/libLLVMWebAssemblyAsmParser.a
+${PLIST.WebAssembly}lib/libLLVMWebAssemblyAsmPrinter.a
+${PLIST.WebAssembly}lib/libLLVMWebAssemblyCodeGen.a
+${PLIST.WebAssembly}lib/libLLVMWebAssemblyDesc.a
+${PLIST.WebAssembly}lib/libLLVMWebAssemblyDisassembler.a
+${PLIST.WebAssembly}lib/libLLVMWebAssemblyInfo.a
 lib/libLLVMWindowsManifest.a
 ${PLIST.X86}lib/libLLVMX86AsmParser.a
 ${PLIST.X86}lib/libLLVMX86AsmPrinter.a
@@ -1562,8 +1568,8 @@
 lib/libLLVMipo.a
 lib/libLTO.${SOEXT}
 ${PLIST.notdylib}lib/libLTO.${SOEXT}.8
+${PLIST.notdylib}lib/libOptRemarks.${SOEXT}.8
 lib/libOptRemarks.so
-${PLIST.notdylib}lib/libOptRemarks.${SOEXT}.8
 share/opt-viewer/opt-diff.py
 share/opt-viewer/opt-stats.py
 share/opt-viewer/opt-viewer.py
diff -r 8f5e543ca672 -r 0ae4e815aed9 lang/llvm/options.mk
--- a/lang/llvm/options.mk      Sun Jun 02 09:48:10 2019 +0000
+++ b/lang/llvm/options.mk      Sun Jun 02 09:48:29 2019 +0000
@@ -1,8 +1,8 @@
-# $NetBSD: options.mk,v 1.4 2019/01/26 23:47:43 tnn Exp $
+# $NetBSD: options.mk,v 1.5 2019/06/02 09:48:29 adam Exp $
 
 PKG_OPTIONS_VAR=       PKG_OPTIONS.llvm
 
-LLVM_TARGETS=  AArch64 AMDGPU ARM BPF Hexagon Lanai Mips MSP430 NVPTX PowerPC Sparc SystemZ X86 XCore
+LLVM_TARGETS=  AArch64 AMDGPU ARM BPF Hexagon Lanai Mips MSP430 NVPTX PowerPC Sparc SystemZ WebAssembly X86 XCore
 
 .for tgt in ${LLVM_TARGETS}
 PLIST_VARS+=                   ${tgt}



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