[pkgsrc/trunk]: pkgsrc/emulators/gxemul emulators/gxemul: check for MIPS divi...

[gson <gson%pkgsrc.org@localhost>]

details:   https://anonhg.NetBSD.org/pkgsrc/rev/20e1160d5309
branches:  trunk
changeset: 383702:20e1160d5309
user:      gson <gson%pkgsrc.org@localhost>
date:      Wed Aug 08 13:53:48 2018 +0000

description:
emulators/gxemul: check for MIPS divide overflow

When emulating the MIPS DIV and DDIV instructions, check for divide
overflow instead of performing the overflowing divide on the host and
crashing the emulator.  This is needed to run recent versions of the
NetBSD test suite on an emulated MIPS system.

diffstat:

 emulators/gxemul/Makefile                                 |   4 +-
 emulators/gxemul/distinfo                                 |   4 +-
 emulators/gxemul/patches/patch-src_cpus_cpu_mips_instr.cc |  35 ++++++++++++--
 3 files changed, 33 insertions(+), 10 deletions(-)

diffs (108 lines):

diff -r a7763dba35d1 -r 20e1160d5309 emulators/gxemul/Makefile
--- a/emulators/gxemul/Makefile Wed Aug 08 12:18:39 2018 +0000
+++ b/emulators/gxemul/Makefile Wed Aug 08 13:53:48 2018 +0000
@@ -1,7 +1,7 @@
-# $NetBSD: Makefile,v 1.60 2018/07/04 13:40:17 jperkin Exp $
+# $NetBSD: Makefile,v 1.61 2018/08/08 13:53:48 gson Exp $
 
 DISTNAME=      gxemul-0.6.0.1
-PKGREVISION=   6
+PKGREVISION=   7
 CATEGORIES=    emulators
 MASTER_SITES=  http://gxemul.sourceforge.net/src/
 
diff -r a7763dba35d1 -r 20e1160d5309 emulators/gxemul/distinfo
--- a/emulators/gxemul/distinfo Wed Aug 08 12:18:39 2018 +0000
+++ b/emulators/gxemul/distinfo Wed Aug 08 13:53:48 2018 +0000
@@ -1,4 +1,4 @@
-$NetBSD: distinfo,v 1.52 2018/03/21 17:39:42 kamil Exp $
+$NetBSD: distinfo,v 1.53 2018/08/08 13:53:48 gson Exp $
 
 SHA1 (gxemul-0.6.0.1.tar.gz) = 8a9b7a6c08628c2a59a6e7e9c7c449c3826b4744
 RMD160 (gxemul-0.6.0.1.tar.gz) = 6943173d4149bfe40218715b8ed2c82b5b361e50
@@ -24,7 +24,7 @@
 SHA1 (patch-src_cpus_cpu__ppc__instr.cc) = cdc664f35cdb289380bb959f1b07c95151b60eed
 SHA1 (patch-src_cpus_cpu__sh.cc) = b72eb6b670fad93198c9ee7d1bb57c0a69027a3a
 SHA1 (patch-src_cpus_cpu_mips.cc) = 0fdeed0a52b4b8a2e256e0f1084cf5a2131a6dce
-SHA1 (patch-src_cpus_cpu_mips_instr.cc) = 5166ef06cbacfd8ecb73796da6d7c511ed42728d
+SHA1 (patch-src_cpus_cpu_mips_instr.cc) = d11566336c179841b206d4777b0fdc4c482de03c
 SHA1 (patch-src_cpus_memory__alpha.cc) = 9bea508cc59aa6856928f0d6f5964f5f24ac648e
 SHA1 (patch-src_cpus_memory__mips__v2p.cc) = 2b859ffa219ded4e7c4a6a0ad3047e4c444d472d
 SHA1 (patch-src_cpus_memory__ppc.cc) = e321cc7acaa4a61fda91f46b05f10863d407ae9f
diff -r a7763dba35d1 -r 20e1160d5309 emulators/gxemul/patches/patch-src_cpus_cpu_mips_instr.cc
--- a/emulators/gxemul/patches/patch-src_cpus_cpu_mips_instr.cc Wed Aug 08 12:18:39 2018 +0000
+++ b/emulators/gxemul/patches/patch-src_cpus_cpu_mips_instr.cc Wed Aug 08 13:53:48 2018 +0000
@@ -1,4 +1,9 @@
-$NetBSD: patch-src_cpus_cpu_mips_instr.cc,v 1.2 2018/03/21 17:39:42 kamil Exp $
+$NetBSD: patch-src_cpus_cpu_mips_instr.cc,v 1.3 2018/08/08 13:53:48 gson Exp $
+
+When emulating the MIPS DIV and DDIV instructions, check for divide
+overflow instead of performing the overflowing divide on the host and
+crashing the emulator.  This is needed to run recent versions of the
+NetBSD test suite on an emulated MIPS system.
 
 implement trap with immediate instructions present in MIPS32.
 
@@ -6,7 +11,25 @@
 
 --- src/cpus/cpu_mips_instr.cc.orig    2014-08-17 08:45:15.000000000 +0000
 +++ src/cpus/cpu_mips_instr.cc
-@@ -1461,6 +1461,92 @@ X(tne)
+@@ -1262,6 +1262,8 @@ X(div)
+       int32_t res, rem;
+       if (b == 0)
+               res = 0, rem = a;
++      else if (a == (int32_t)0x80000000U && b == -1)
++              res = 0, rem = 0;
+       else
+               res = a / b, rem = a - b*res;
+       cpu->cd.mips.lo = (int32_t)res;
+@@ -1284,6 +1286,8 @@ X(ddiv)
+       int64_t res, rem;
+       if (b == 0)
+               res = 0;
++      else if (a == (int64_t)0x8000000000000000ULL && b == -1)
++              res = 0;
+       else
+               res = a / b;
+       rem = a - b*res;
+@@ -1461,6 +1465,92 @@ X(tne)
        }
  }
  
@@ -99,7 +122,7 @@
  
  /*
   *  3-register arithmetic instructions:
-@@ -3983,7 +4069,7 @@ X(to_be_translated)
+@@ -3983,7 +4073,7 @@ X(to_be_translated)
                if (cpu->delay_slot) {
                        if (!cpu->translation_readahead)
                                fatal("TODO: branch in delay slot (=%i)? (3);"
@@ -108,7 +131,7 @@
                                    cpu->delay_slot, (uint64_t)addr, iword);
                        goto bad;
                }
-@@ -4446,6 +4532,37 @@ X(to_be_translated)
+@@ -4446,6 +4536,37 @@ X(to_be_translated)
                        }
                        break;
  
@@ -146,7 +169,7 @@
                default:if (!cpu->translation_readahead)
                                fatal("UNIMPLEMENTED regimm rt=%i\n", rt);
                        goto bad;
-@@ -4753,7 +4870,7 @@ X(to_be_translated)
+@@ -4753,7 +4874,7 @@ X(to_be_translated)
                if (!has_warned && !cpu->translation_readahead) {
                        fatal("[ WARNING/NOTE: attempt to execute a 64-bit"
                            " instruction on an emulated 32-bit processor; "
@@ -155,7 +178,7 @@
                        has_warned = 1;
                }
                if (cpu->translation_readahead)
-@@ -4770,4 +4887,3 @@ X(to_be_translated)
+@@ -4770,4 +4891,3 @@ X(to_be_translated)
  #include "cpu_dyntrans.cc" 
  #undef        DYNTRANS_TO_BE_TRANSLATED_TAIL
  }