[pkgsrc/trunk]: pkgsrc/cad/veriwell Import veriwell-2.8.7 as cad/veriwell

[kamil <kamil%pkgsrc.org@localhost>]

details:   https://anonhg.NetBSD.org/pkgsrc/rev/a8343f72710f
branches:  trunk
changeset: 353580:a8343f72710f
user:      kamil <kamil%pkgsrc.org@localhost>
date:      Sun Oct 09 13:14:06 2016 +0000

description:
Import veriwell-2.8.7 as cad/veriwell

VeriWell is a full Verilog simulator. It supports nearly all of the
IEEE1364-1995 standard, as well as PLI 1.0.

Yes, VeriWell *is* the same simulator that was sold by Wellspring Solutions in
the mid-1990 and was included with the Thomas and Moorby book.

diffstat:

 cad/veriwell/DESCR    |   5 +++++
 cad/veriwell/Makefile |  18 ++++++++++++++++++
 cad/veriwell/PLIST    |   7 +++++++
 cad/veriwell/distinfo |   6 ++++++
 4 files changed, 36 insertions(+), 0 deletions(-)

diffs (52 lines):

diff -r 92f6f78db404 -r a8343f72710f cad/veriwell/DESCR
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/cad/veriwell/DESCR        Sun Oct 09 13:14:06 2016 +0000
@@ -0,0 +1,5 @@
+VeriWell is a full Verilog simulator. It supports nearly all of the
+IEEE1364-1995 standard, as well as PLI 1.0.
+
+Yes, VeriWell *is* the same simulator that was sold by Wellspring Solutions in
+the mid-1990 and was included with the Thomas and Moorby book.
diff -r 92f6f78db404 -r a8343f72710f cad/veriwell/Makefile
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/cad/veriwell/Makefile     Sun Oct 09 13:14:06 2016 +0000
@@ -0,0 +1,18 @@
+# $NetBSD: Makefile,v 1.1 2016/10/09 13:14:06 kamil Exp $
+
+DISTNAME=      veriwell-2.8.7
+CATEGORIES=    cad
+MASTER_SITES=  ${MASTER_SITE_SOURCEFORGE:=veriwell/}
+
+MAINTAINER=    pkgsrc-users%NetBSD.org@localhost
+HOMEPAGE=      https://sourceforge.net/projects/veriwell/
+COMMENT=       Verilog Simulator
+LICENSE=       gnu-gpl-v2
+
+GNU_CONFIGURE= yes
+USE_LANGUAGES= c c++
+
+TEST_TARGET=   check
+
+.include "../../devel/zlib/buildlink3.mk"
+.include "../../mk/bsd.pkg.mk"
diff -r 92f6f78db404 -r a8343f72710f cad/veriwell/PLIST
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/cad/veriwell/PLIST        Sun Oct 09 13:14:06 2016 +0000
@@ -0,0 +1,7 @@
+@comment $NetBSD: PLIST,v 1.1 2016/10/09 13:14:06 kamil Exp $
+bin/veriwell
+include/acc_user.h
+include/veriuser.c
+include/veriuser.h
+lib/libveriwell.la
+man/man1/veriwell.1
diff -r 92f6f78db404 -r a8343f72710f cad/veriwell/distinfo
--- /dev/null   Thu Jan 01 00:00:00 1970 +0000
+++ b/cad/veriwell/distinfo     Sun Oct 09 13:14:06 2016 +0000
@@ -0,0 +1,6 @@
+$NetBSD: distinfo,v 1.1 2016/10/09 13:14:06 kamil Exp $
+
+SHA1 (veriwell-2.8.7.tar.gz) = 9ef4e6a25a4fd65db325a89ed89b199547fabbd6
+RMD160 (veriwell-2.8.7.tar.gz) = 3d86c40b353f701d61cab301e0f7c3ec136c88e7
+SHA512 (veriwell-2.8.7.tar.gz) = c0858ce71bd8cfef989e96899bc0d5fc0c919d8248cad0bebde7faf31073cde0423ddb168cf0fabb9f7b46ced7b953ad392627b7e1ad5ea1e7ef75f9524717a8
+Size (veriwell-2.8.7.tar.gz) = 875596 bytes