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Re: PR/56434 CVS commit: src/sys/dev/pci



The following reply was made to PR port-alpha/56434; it has been noted by GNATS.

From: Jason Thorpe <thorpej%me.com@localhost>
To: Andreas Gustafsson <gson%gson.org@localhost>
Cc: Jason Thorpe <thorpej%netbsd.org@localhost>,
 gnats-bugs%netbsd.org@localhost
Subject: Re: PR/56434 CVS commit: src/sys/dev/pci
Date: Mon, 20 Nov 2023 08:05:36 -0800

 > On Nov 20, 2023, at 7:59 AM, Andreas Gustafsson <gson%gson.org@localhost> wrote:
 >=20
 > Jason Thorpe wrote:
 >> There is apparently no constraint on the address, only the length.
 >=20
 > http://ftp.parisc-linux.org/docs/chips/PC87415.pdf shows a 31-bit
 > address and a hardcoded LSB of 0 in Table III, and the first
 > paragraph on page 25 says "The Memory Region Physical Base Address
 > is aligned on a 2 byte boundary".
 >=20
 > =
 https://pdos.csail.mit.edu/6.828/2018/readings/hardware/IDE-BusMaster.pdf
 > also has a hardcoded LSB of 0 in Figure 1.
 
 Ok, well, Qemu doesn=E2=80=99t appear to enforce that, so=E2=80=A6 =
 (maybe I missed it?)
 
 -- thorpej
 


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