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RE: kern/57696: NetBSD-10.0_RC1-amd64-install.img.gz kernel panics at reboot or shutdown on mid 2010 21.5" iMac



> From: Taylor R Campbell <campbell%mumble.net@localhost> On Behalf Of Taylor R Campbell
> Sent: Monday, November 13, 2023 5:42 PM
>> Date: Mon, 13 Nov 2023 15:15:53 +0000
>> From: Josh Moyer <JMoyer%nodomain.net@localhost>
>> 
>> [     1.036831] uhci0 at pci0 dev 26 function 0: Intel 3400 USB (rev. 0x06)
>> [     1.036831] cannot set up pci_intr_handle_t
>> [     1.036831] uhci0: autoconfiguration error: couldn't map interrupt
>> ...
>> [     1.036831] uhci1 at pci0 dev 29 function 0: Intel 3400 USB (rev. 0x06)
>> [     1.036831] cannot set up pci_intr_handle_t
>> [     1.036831] uhci1: autoconfiguration error: couldn't map interrupt
>
> This looks likely to be the culprit -- uhci attach failed, but left it in a
> state not expected by uhci detach.
>
> This message comes from the x86 pci_intx_alloc when pci_intr_map
> fails:
>
>    448 	if (pci_intr_map(pa, handle) != 0) {
>    449 		aprint_normal("cannot set up pci_intr_handle_t\n");
>    450 		error = EINVAL;
>    451 		goto error;
>    452 	}
>
> https://nxr.netbsd.org/xref/src/sys/arch/x86/pci/pci_intr_machdep.c#448
>
> Can you share the output of the following commands?
>
> # pcictl pci0 dump -d 26 -f 0
PCI configuration registers:
  Common header:
    0x00: 0x3b3b8086 0x02900005 0x0c030006 0x00800000

    Vendor Name: Intel (0x8086)
    Device Name: 3400 USB (0x3b3b)
    Command register: 0x0005
      I/O space accesses: on
      Memory space accesses: off
      Bus mastering: on
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): off
      Fast back-to-back transactions: off
      Interrupt disable: off
    Status register: 0x0290
      Immediate Readiness: off
      Interrupt status: inactive
      Capability List support: on
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: on
      Data parity error detected: off
      DEVSEL timing: medium (0x1)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: serial bus (0x0c)
    Subclass Name: USB (0x03)
    Interface Name: UHCI (0x00)
    Revision ID: 0x06
    BIST: 0x00
    Header Type: 0x00+multifunction (0x80)
    Latency Timer: 0x00
    Cache Line Size: 0bytes (0x00)

  Type 0 ("normal" device) header:
    0x10: 0x00000000 0x00000000 0x00000000 0x00000000
    0x20: 0x00003101 0x00000000 0x00000000 0x72708086
    0x30: 0x00000000 0x00000050 0x00000000 0x00000000

    Base address register at 0x10
      not implemented
    Base address register at 0x14
      not implemented
    Base address register at 0x18
      not implemented
    Base address register at 0x1c
      not implemented
    Base address register at 0x20
      type: I/O
      base: 0x00003100
    Base address register at 0x24
      not implemented
    Cardbus CIS Pointer: 0x00000000
    Subsystem vendor ID: 0x8086
    Subsystem ID: 0x7270
    Expansion ROM Base Address Register: 0x00000000
      base: 0x00000000
      Expansion ROM Enable: off
      Validation Status: Validation not supported
      Validation Details: 0x0
    Capability list pointer: 0x50
    Reserved @ 0x38: 0x00000000
    Maximum Latency: 0x00
    Minimum Grant: 0x00
    Interrupt pin: 0x00 (none)
    Interrupt line: 0x00

  Capability register at 0x50
    type: 0x13 (Advanced Features)

  Advanced Features Capability Register
    AF Capabilities register: 0x03
    AF Structure Length: 0x06
      Transaction Pending: on
      Function Level Reset: on
    AF Control register: 0x00
    AF Status register: 0x00
      Transaction Pending: off

  Device-dependent header:
    0x40: 0x00000000 0x00000000 0x00000000 0x00000000
    0x50: 0x03060013 0x00000000 0x00000000 0x00000000
    0x60: 0x00000010 0x00000000 0x00000000 0x00000000
    0x70: 0x00000000 0x00000000 0x00000000 0x00000000
    0x80: 0x00000000 0x00000000 0x00000000 0x00000000
    0x90: 0x00000000 0x00000000 0x00000000 0x00000000
    0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xc0: 0x00000500 0x00000000 0x00010000 0x00000000
    0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xf0: 0x00000000 0x00000000 0x08060f87 0x00000000

> # pcictl pci0 dump -d 29 -f 0
PCI configuration registers:
  Common header:
    0x00: 0x3b368086 0x02900005 0x0c030006 0x00800000

    Vendor Name: Intel (0x8086)
    Device Name: 3400 USB (0x3b36)
    Command register: 0x0005
      I/O space accesses: on
      Memory space accesses: off
      Bus mastering: on
      Special cycles: off
      MWI transactions: off
      Palette snooping: off
      Parity error checking: off
      Address/data stepping: off
      System error (SERR): off
      Fast back-to-back transactions: off
      Interrupt disable: off
    Status register: 0x0290
      Immediate Readiness: off
      Interrupt status: inactive
      Capability List support: on
      66 MHz capable: off
      User Definable Features (UDF) support: off
      Fast back-to-back capable: on
      Data parity error detected: off
      DEVSEL timing: medium (0x1)
      Slave signaled Target Abort: off
      Master received Target Abort: off
      Master received Master Abort: off
      Asserted System Error (SERR): off
      Parity error detected: off
    Class Name: serial bus (0x0c)
    Subclass Name: USB (0x03)
    Interface Name: UHCI (0x00)
    Revision ID: 0x06
    BIST: 0x00
    Header Type: 0x00+multifunction (0x80)
    Latency Timer: 0x00
    Cache Line Size: 0bytes (0x00)

  Type 0 ("normal" device) header:
    0x10: 0x00000000 0x00000000 0x00000000 0x00000000
    0x20: 0x000030a1 0x00000000 0x00000000 0x72708086
    0x30: 0x00000000 0x00000050 0x00000000 0x00000000

    Base address register at 0x10
      not implemented
    Base address register at 0x14
      not implemented
    Base address register at 0x18
      not implemented
    Base address register at 0x1c
      not implemented
    Base address register at 0x20
      type: I/O
      base: 0x000030a0
    Base address register at 0x24
      not implemented
    Cardbus CIS Pointer: 0x00000000
    Subsystem vendor ID: 0x8086
    Subsystem ID: 0x7270
    Expansion ROM Base Address Register: 0x00000000
      base: 0x00000000
      Expansion ROM Enable: off
      Validation Status: Validation not supported
      Validation Details: 0x0
    Capability list pointer: 0x50
    Reserved @ 0x38: 0x00000000
    Maximum Latency: 0x00
    Minimum Grant: 0x00
    Interrupt pin: 0x00 (none)
    Interrupt line: 0x00

  Capability register at 0x50
    type: 0x13 (Advanced Features)

  Advanced Features Capability Register
    AF Capabilities register: 0x03
    AF Structure Length: 0x06
      Transaction Pending: on
      Function Level Reset: on
    AF Control register: 0x00
    AF Status register: 0x00
      Transaction Pending: off

  Device-dependent header:
    0x40: 0x00000000 0x00000000 0x00000000 0x00000000
    0x50: 0x03060013 0x00000000 0x00000000 0x00000000
    0x60: 0x00000010 0x00000000 0x00000000 0x00000000
    0x70: 0x00000000 0x00000000 0x00000000 0x00000000
    0x80: 0x00000000 0x00000000 0x00000000 0x00000000
    0x90: 0x00000000 0x00000000 0x00000000 0x00000000
    0xa0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xb0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xc0: 0x00000500 0x00000000 0x00010000 0x00000000
    0xd0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xe0: 0x00000000 0x00000000 0x00000000 0x00000000
    0xf0: 0x00000000 0x00000000 0x08060f87 0x00000000

> Perhaps that will provide a clue about what's wrong with the device's
> PCI interrupt mapping.
>
> Is this problem new?  Does it occur with, e.g., the 9.3 image, or 8.2,
> or any other older versions?

I checked and saw the same system messages with 9.3 and ran the pcictl dump there, too.  The output between the 9.3 and 10_RC1 pcictl invocations diffd identically.  However, the 9.3 install reboots without incident.



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