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port-pmax/52242: NetBSD/pmax kernel (both GENERIC and INSTALL) fail to boot in GXemul
>Number: 52242
>Category: port-pmax
>Synopsis: NetBSD/pmax kernel (both GENERIC and INSTALL) fail to boot in GXemul
>Confidential: no
>Severity: serious
>Priority: medium
>Responsible: port-pmax-maintainer
>State: open
>Class: sw-bug
>Submitter-Id: net
>Arrival-Date: Thu May 18 14:00:00 +0000 2017
>Originator: Utkarsh Anand
>Release: 7.99.71
>Organization:
>Environment:
>Description:
I am unable to boot the VM using either of GENERIC or INSTALL kernels (NetBSD/pmax port).
Here's the last line in the emulator window (while booting):
dz0 at ibus0 addr 0x1c000000: DC-7085, 4 lines
Here's a screenshot (the screenshot is for 7.99.43): https://drive.google.com/open?id=0B1M0oDUwRDEiQm5Md3VYZ0tIbFE
So, I performed a git bisect, to find out the first bad commit. Here's the output for git bisect log:
git bisect start
# bad: [b6559c25821a0eabfd13d75abcce9894ac0d4712] Enabled @ as a key to enter ddb in serial consoles
git bisect bad b6559c25821a0eabfd13d75abcce9894ac0d4712
# good: [ce84947acc87dd3bba7792982abf3f163829c696] 7.1 -> 7.1.1
git bisect good ce84947acc87dd3bba7792982abf3f163829c696
# good: [b56f041906e84a7daf888797a1f6ee7e87506ce0] added `usr.gnubin' for new gnu binaries necessary for the distribution.
git bisect good b56f041906e84a7daf888797a1f6ee7e87506ce0
# good: [6c50b2abec4ac3392d78f32124d7416bf71bb37f] Bump date for last.
git bisect good 6c50b2abec4ac3392d78f32124d7416bf71bb37f
# good: [b1764f7d896d7e322a7f9805fa8b786c5826e4ad] fix a typo resulting in warn-max being shown in two columns (one time instead of crit-min); ok pgoyette
git bisect good b1764f7d896d7e322a7f9805fa8b786c5826e4ad
# good: [1f531b5488d9f6b2337ec7a8f9a07370b8a64494] Turn off direct mapped phys
git bisect good 1f531b5488d9f6b2337ec7a8f9a07370b8a64494
# good: [0077e032945f470f0ff8f009e27efe81517ac1d3] Remove trailing whitespace.
git bisect good 0077e032945f470f0ff8f009e27efe81517ac1d3
# good: [0077e032945f470f0ff8f009e27efe81517ac1d3] Remove trailing whitespace.
git bisect good 0077e032945f470f0ff8f009e27efe81517ac1d3
# good: [b77cca342f8dd22cc000b624eb453e51fed616e0] Remove a KASSERT() which is A20-specific, as well as the local variable used here. Fix "error: unused variable 'grp'" for non-DIAGNOSTIC kernels, reported by Rin Okuyama.
git bisect good b77cca342f8dd22cc000b624eb453e51fed616e0
# bad: [72cff2d435de6644b51aee4f0dd3834b7970e5c3] Don't apply the suffix (curdir) to MAKEOBJDIR
git bisect bad 72cff2d435de6644b51aee4f0dd3834b7970e5c3
# good: [21ce32af7367f19d7242967a9513709f620e563c] Add fenv.h
git bisect good 21ce32af7367f19d7242967a9513709f620e563c
# good: [51374f2e4ba15f0bf9e55adf208406b63441bbef] pass GDB_MACHINE_ARCH to mknative-gdb and use that as the subdir. obtain GDB_MACHINE_ARCH from the new gdb Makefile.gdb_arch.
git bisect good 51374f2e4ba15f0bf9e55adf208406b63441bbef
# good: [e7b4c757ffcd1cfaa9d552e2a61f812d9898391e] Remove useless values, and explain where some others come from
git bisect good e7b4c757ffcd1cfaa9d552e2a61f812d9898391e
# bad: [d0890cf662163594663edbecc362ad59267cd754] Remove duplicated PT_DUMPCORE description in machine-specific calls section
git bisect bad d0890cf662163594663edbecc362ad59267cd754
# bad: [f7d7ba4e71fc6d11fd181f3977cbefc32cc29b39] We must use PSLIST_ENTRY_DESTROY after PSLIST_WRITER_REMOVE and waiting all readers done.
git bisect bad f7d7ba4e71fc6d11fd181f3977cbefc32cc29b39
# good: [6d0b08b217caf902b999ee232ba61771b7126805] Fix librefuse falout.... Hi pho
git bisect good 6d0b08b217caf902b999ee232ba61771b7126805
# bad: [a6cdb44e9d77cbc064f09c76a605939289fe9a9f] Initialize the bufq stuff for rump, too.
git bisect bad a6cdb44e9d77cbc064f09c76a605939289fe9a9f
# good: [46c62fc960eb929f2ddc15f3187b3695d40a2be9] if there is more than one : it is not an X display, it is a v6 address
git bisect good 46c62fc960eb929f2ddc15f3187b3695d40a2be9
# good: [238d48401a69e3ccbd8902b858dd9cf93c9488b4] Define a new module class for the bufq_strategy modules. These need to be loaded and intialized before autoconfigure runs, since some devices (like disks and floppy drives) want to call bufq_alloc().
git bisect good 238d48401a69e3ccbd8902b858dd9cf93c9488b4
# bad: [ba163bde28ef72bc461c77ea413f549f13dec61f] switch to common MIPS bus_space and bus_dma tested by flxd@
git bisect bad ba163bde28ef72bc461c77ea413f549f13dec61f
# good: [5855bb091d7ad1bf64c707469fffa7b12cbbfdc6] Initialize the bufq code right before we're ready to load the strategy modules.
git bisect good 5855bb091d7ad1bf64c707469fffa7b12cbbfdc6
# good: [77e9031501a339750a2e37f1a80da83e2f42a651] Major rework of fuse_opt_parse(3) so that it supports all the functionality of the original function
git bisect good 77e9031501a339750a2e37f1a80da83e2f42a651
# first bad commit: [ba163bde28ef72bc461c77ea413f549f13dec61f] switch to common MIPS bus_space and bus_dma tested by flxd@
Here's the diff:
diff --git a/sys/arch/pmax/conf/files.pmax b/sys/arch/pmax/conf/files.pmax
index 7ca5cfe..6c9ef21a 100644
--- a/sys/arch/pmax/conf/files.pmax
+++ b/sys/arch/pmax/conf/files.pmax
@@ -1,4 +1,4 @@
-# $NetBSD: files.pmax,v 1.117 2016/11/04 19:18:50 flxd Exp $
+# $NetBSD: files.pmax,v 1.118 2016/11/16 19:37:06 macallan Exp $
# DECstation-specific configuration info
# maxpartitions must be first item in files.${ARCH}.
@@ -16,6 +16,12 @@ device cpu # not optional
attach cpu at mainbus
file arch/pmax/pmax/cpu.c cpu
+#
+# common mips stuff
+#
+file arch/mips/mips/bus_dma.c
+
+
# Model support option headers
defflag DEC_3100 # DECstation 2100, 3100 (kn01)
defflag DEC_5100 # DECsystem 5100 (kn230)
@@ -122,8 +128,7 @@ attach le at ibus with le_pmax: le24, le_dec_subr
file arch/pmax/ibus/if_le_ibus.c le_pmax
file arch/pmax/pmax/autoconf.c
-file arch/pmax/pmax/bus_dma.c
-file arch/pmax/pmax/bus_space.c
+file arch/pmax/pmax/bus.c
file arch/pmax/pmax/disksubr.c
file arch/pmax/pmax/machdep.c
file arch/pmax/pmax/mainbus.c
@@ -133,7 +138,6 @@ file arch/pmax/pmax/sysconf.c
file arch/pmax/stand/common/callvec.c
file dev/cons.c
-file dev/bus_dma/bus_dmamem_common.c
#
# Workstation console devices
diff --git a/sys/arch/pmax/ibus/ibus_3max.c b/sys/arch/pmax/ibus/ibus_3max.c
index 1be621c..f468786 100644
--- a/sys/arch/pmax/ibus/ibus_3max.c
+++ b/sys/arch/pmax/ibus/ibus_3max.c
@@ -1,4 +1,4 @@
-/* $NetBSD: ibus_3max.c,v 1.15 2011/07/09 17:32:29 matt Exp $ */
+/* $NetBSD: ibus_3max.c,v 1.16 2016/11/16 19:37:06 macallan Exp $ */
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: ibus_3max.c,v 1.15 2011/07/09 17:32:29 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ibus_3max.c,v 1.16 2016/11/16 19:37:06 macallan Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -68,6 +68,7 @@ kn02sys_attach(device_t parent, device_t self, void *aux)
ida.ida_busname = "ibus";
ida.ida_devs = kn02sys_devs;
ida.ida_ndevs = __arraycount(kn02sys_devs);
+ ida.ida_memt = normal_memt;
ibusattach(parent, self, &ida);
}
diff --git a/sys/arch/pmax/ibus/ibus_pmax.c b/sys/arch/pmax/ibus/ibus_pmax.c
index 89fc100..dabd878 100644
--- a/sys/arch/pmax/ibus/ibus_pmax.c
+++ b/sys/arch/pmax/ibus/ibus_pmax.c
@@ -1,4 +1,4 @@
-/* $NetBSD: ibus_pmax.c,v 1.23 2011/07/09 17:32:29 matt Exp $ */
+/* $NetBSD: ibus_pmax.c,v 1.24 2016/11/16 19:37:06 macallan Exp $ */
/*
* Copyright (c) 1998 Jonathan Stone. All rights reserved.
@@ -31,7 +31,7 @@
*/
#include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
-__KERNEL_RCSID(0, "$NetBSD: ibus_pmax.c,v 1.23 2011/07/09 17:32:29 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: ibus_pmax.c,v 1.24 2016/11/16 19:37:06 macallan Exp $");
#include "opt_dec_3100.h"
#include "opt_dec_5100.h"
@@ -113,6 +113,7 @@ ibus_pmax_attach(device_t parent, device_t self, void *aux)
ibus_attached = 1;
ida.ida_busname = "ibus";
+ ida.ida_memt = normal_memt;
switch (systype) {
#ifdef DEC_3100
case DS_PMAX:
diff --git a/sys/arch/pmax/include/bus.h b/sys/arch/pmax/include/bus.h
index e6e871f..10e8b3d 100644
--- a/sys/arch/pmax/include/bus.h
+++ b/sys/arch/pmax/include/bus.h
@@ -1,4 +1,4 @@
-/* $NetBSD: bus.h,v 1.30 2011/02/20 07:50:25 matt Exp $ */
+/* $NetBSD: bus.h,v 1.31 2016/11/16 19:37:06 macallan Exp $ */
/*-
* Copyright (c) 1996, 1997, 1998, 2001 The NetBSD Foundation, Inc.
@@ -41,626 +41,13 @@
#define __PB_TYPENAME_PREFIX(BITS) ___CONCAT(u_int,BITS)
#define __PB_TYPENAME(BITS) ___CONCAT(__PB_TYPENAME_PREFIX(BITS),_t)
-/*
- * Bus address and size types
- */
-typedef u_long bus_addr_t;
-typedef u_long bus_size_t;
-
-/*
- * Access methods for bus resources and address space.
- */
-typedef int bus_space_tag_t;
-typedef u_long bus_space_handle_t;
-
-/*
- * int bus_space_map(bus_space_tag_t t, bus_addr_t addr,
- * bus_size_t size, int flags, bus_space_handle_t *bshp);
- *
- * Map a region of bus space.
- */
-
-#define BUS_SPACE_MAP_CACHEABLE 0x01
-#define BUS_SPACE_MAP_LINEAR 0x02
-#define BUS_SPACE_MAP_PREFETCHABLE 0x04
-
-int bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t,
- int, bus_space_handle_t *);
-
-/*
- * void bus_space_unmap(bus_space_tag_t t,
- * bus_space_handle_t bsh, bus_size_t size);
- *
- * Unmap a region of bus space.
- */
-
-void bus_space_unmap(bus_space_tag_t, bus_space_handle_t, bus_size_t);
-
-/*
- * int bus_space_subregion(bus_space_tag_t t,
- * bus_space_handle_t bsh, bus_size_t offset, bus_size_t size,
- * bus_space_handle_t *nbshp);
- *
- * Get a new handle for a subregion of an already-mapped area of bus space.
- */
-
-int bus_space_subregion(bus_space_tag_t t, bus_space_handle_t bsh,
- bus_size_t offset, bus_size_t size, bus_space_handle_t *nbshp);
-
-/*
- * int bus_space_alloc(bus_space_tag_t t, bus_addr_t, rstart,
- * bus_addr_t rend, bus_size_t size, bus_size_t align,
- * bus_size_t boundary, int flags, bus_addr_t *addrp,
- * bus_space_handle_t *bshp);
- *
- * Allocate a region of bus space.
- */
-
-int bus_space_alloc(bus_space_tag_t t, bus_addr_t rstart,
- bus_addr_t rend, bus_size_t size, bus_size_t align,
- bus_size_t boundary, int cacheable, bus_addr_t *addrp,
- bus_space_handle_t *bshp);
-
-/*
- * int bus_space_free(bus_space_tag_t t,
- * bus_space_handle_t bsh, bus_size_t size);
- *
- * Free a region of bus space.
- */
-
-void bus_space_free(bus_space_tag_t t, bus_space_handle_t bsh,
- bus_size_t size);
-
-/*
- * void *bus_space_vaddr(bus_space_tag_t, bus_space_handle_t);
- *
- * Get the kernel virtual address for the mapped bus space.
- * Only allowed for regions mapped with BUS_SPACE_MAP_LINEAR.
- * (XXX not enforced)
- */
-#define bus_space_vaddr(t, h) \
- ((void *)(h))
-
-/*
- * u_intN_t bus_space_read_N(bus_space_tag_t tag,
- * bus_space_handle_t bsh, bus_size_t offset);
- *
- * Read a 1, 2, 4, or 8 byte quantity from bus space
- * described by tag/handle/offset.
- */
-
-#define bus_space_read_1(t, h, o) \
- ((void) t, (*(volatile u_int8_t *)((h) + (o))))
-
-#define bus_space_read_2(t, h, o) \
- ((void) t, (*(volatile u_int16_t *)((h) + (o))))
-
-#define bus_space_read_4(t, h, o) \
- ((void) t, (*(volatile uint32_t *)((h) + (o))))
-
-#if 0 /* Cause a link error for bus_space_read_8 */
-#define bus_space_read_8(t, h, o) !!! bus_space_read_8 unimplemented !!!
-#endif
-
-/*
- * void bus_space_read_multi_N(bus_space_tag_t tag,
- * bus_space_handle_t bsh, bus_size_t offset,
- * u_intN_t *addr, size_t count);
- *
- * Read `count' 1, 2, 4, or 8 byte quantities from bus space
- * described by tag/handle/offset and copy into buffer provided.
- */
-
-#define __PMAX_bus_space_read_multi(BYTES,BITS) \
-static __inline void __CONCAT(bus_space_read_multi_,BYTES) \
- (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
- __PB_TYPENAME(BITS) *, size_t); \
- \
-static __inline void \
-__CONCAT(bus_space_read_multi_,BYTES)( \
- bus_space_tag_t t, \
- bus_space_handle_t h, \
- bus_size_t o, \
- __PB_TYPENAME(BITS) *a, \
- size_t c) \
-{ \
- \
- while (c--) \
- *a++ = __CONCAT(bus_space_read_,BYTES)(t, h, o); \
-}
-
-__PMAX_bus_space_read_multi(1,8)
-__PMAX_bus_space_read_multi(2,16)
-__PMAX_bus_space_read_multi(4,32)
-
-#if 0 /* Cause a link error for bus_space_read_multi_8 */
-#define bus_space_read_multi_8 !!! bus_space_read_multi_8 unimplemented !!!
-#endif
-
-#undef __PMAX_bus_space_read_multi
-
-/*
- * void bus_space_read_region_N(bus_space_tag_t tag,
- * bus_space_handle_t bsh, bus_size_t offset,
- * u_intN_t *addr, size_t count);
- *
- * Read `count' 1, 2, 4, or 8 byte quantities from bus space
- * described by tag/handle and starting at `offset' and copy into
- * buffer provided.
- */
-
-#define __PMAX_bus_space_read_region(BYTES,BITS) \
-static __inline void __CONCAT(bus_space_read_region_,BYTES) \
- (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
- __PB_TYPENAME(BITS) *, size_t); \
- \
-static __inline void \
-__CONCAT(bus_space_read_region_,BYTES)( \
- bus_space_tag_t t, \
- bus_space_handle_t h, \
- bus_size_t o, \
- __PB_TYPENAME(BITS) *a, \
- size_t c) \
-{ \
- \
- while (c--) { \
- *a++ = __CONCAT(bus_space_read_,BYTES)(t, h, o); \
- o += BYTES; \
- } \
-}
-
-__PMAX_bus_space_read_region(1,8)
-__PMAX_bus_space_read_region(2,16)
-__PMAX_bus_space_read_region(4,32)
-
-#if 0 /* Cause a link error for bus_space_read_region_8 */
-#define bus_space_read_region_8 !!! bus_space_read_region_8 unimplemented !!!
-#endif
-
-#undef __PMAX_bus_space_read_region
-
-/*
- * void bus_space_write_N(bus_space_tag_t tag,
- * bus_space_handle_t bsh, bus_size_t offset,
- * u_intN_t value);
- *
- * Write the 1, 2, 4, or 8 byte value `value' to bus space
- * described by tag/handle/offset.
- */
-
-#define bus_space_write_1(t, h, o, v) \
-do { \
- (void) t; \
- *(volatile uint8_t *)((h) + (o)) = (v); \
- wbflush(); /* XXX */ \
-} while (0)
-
-#define bus_space_write_2(t, h, o, v) \
-do { \
- (void) t; \
- *(volatile uint16_t *)((h) + (o)) = (v); \
- wbflush(); /* XXX */ \
-} while (0)
-
-#define bus_space_write_4(t, h, o, v) \
-do { \
- (void) t; \
- *(volatile uint32_t *)((h) + (o)) = (v); \
- wbflush(); /* XXX */ \
-} while (0)
-
-#if 0 /* Cause a link error for bus_space_write_8 */
-#define bus_space_write_8 !!! bus_space_write_8 not implemented !!!
-#endif
-
-/*
- * void bus_space_write_multi_N(bus_space_tag_t tag,
- * bus_space_handle_t bsh, bus_size_t offset,
- * const u_intN_t *addr, size_t count);
- *
- * Write `count' 1, 2, 4, or 8 byte quantities from the buffer
- * provided to bus space described by tag/handle/offset.
- */
-
-#define __PMAX_bus_space_write_multi(BYTES,BITS) \
-static __inline void __CONCAT(bus_space_write_multi_,BYTES) \
- (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
- __PB_TYPENAME(BITS) *, size_t); \
- \
-static __inline void \
-__CONCAT(bus_space_write_multi_,BYTES)( \
- bus_space_tag_t t, \
- bus_space_handle_t h, \
- bus_size_t o, \
- __PB_TYPENAME(BITS) *a, \
- size_t c) \
-{ \
- \
- while (c--) \
- __CONCAT(bus_space_write_,BYTES)(t, h, o, *a++); \
-}
-
-__PMAX_bus_space_write_multi(1,8)
-__PMAX_bus_space_write_multi(2,16)
-__PMAX_bus_space_write_multi(4,32)
-
-#if 0 /* Cause a link error for bus_space_write_8 */
-#define bus_space_write_multi_8(t, h, o, a, c) \
- !!! bus_space_write_multi_8 unimplimented !!!
-#endif
-
-#undef __PMAX_bus_space_write_multi
-
-/*
- * void bus_space_write_region_N(bus_space_tag_t tag,
- * bus_space_handle_t bsh, bus_size_t offset,
- * const u_intN_t *addr, size_t count);
- *
- * Write `count' 1, 2, 4, or 8 byte quantities from the buffer provided
- * to bus space described by tag/handle starting at `offset'.
- */
-
-#define __PMAX_bus_space_write_region(BYTES,BITS) \
-static __inline void __CONCAT(bus_space_write_region_,BYTES) \
- (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
- __PB_TYPENAME(BITS) *, size_t); \
- \
-static __inline void \
-__CONCAT(bus_space_write_region_,BYTES)( \
- bus_space_tag_t t, \
- bus_space_handle_t h, \
- bus_size_t o, \
- __PB_TYPENAME(BITS) *a, \
- size_t c) \
-{ \
- \
- while (c--) { \
- __CONCAT(bus_space_write_,BYTES)(t, h, o, *a++); \
- o += BYTES; \
- } \
-}
-
-__PMAX_bus_space_write_region(1,8)
-__PMAX_bus_space_write_region(2,16)
-__PMAX_bus_space_write_region(4,32)
-
-#if 0 /* Cause a link error for bus_space_write_region_8 */
-#define bus_space_write_region_8 \
- !!! bus_space_write_region_8 unimplemented !!!
-#endif
-
-#undef __PMAX_bus_space_write_region
-
-/*
- * void bus_space_set_multi_N(bus_space_tag_t tag,
- * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
- * size_t count);
- *
- * Write the 1, 2, 4, or 8 byte value `val' to bus space described
- * by tag/handle/offset `count' times.
- */
-
-#define __PMAX_bus_space_set_multi(BYTES,BITS) \
-static __inline void __CONCAT(bus_space_set_multi_,BYTES) \
- (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
- __PB_TYPENAME(BITS), size_t); \
- \
-static __inline void \
-__CONCAT(bus_space_set_multi_,BYTES)( \
- bus_space_tag_t t, \
- bus_space_handle_t h, \
- bus_size_t o, \
- __PB_TYPENAME(BITS) v, \
- size_t c) \
-{ \
- \
- while (c--) \
- __CONCAT(bus_space_write_,BYTES)(t, h, o, v); \
-}
-
-__PMAX_bus_space_set_multi(1,8)
-__PMAX_bus_space_set_multi(2,16)
-__PMAX_bus_space_set_multi(4,32)
-
-#if 0 /* Cause a link error for bus_space_set_multi_8 */
-#define bus_space_set_multi_8 \
- !!! bus_space_set_multi_8 unimplemented !!!
-#endif
-
-#undef __PMAX_bus_space_set_multi
-
-/*
- * void bus_space_set_region_N(bus_space_tag_t tag,
- * bus_space_handle_t bsh, bus_size_t offset, u_intN_t val,
- * size_t count);
- *
- * Write `count' 1, 2, 4, or 8 byte value `val' to bus space described
- * by tag/handle starting at `offset'.
- */
-
-#define __PMAX_bus_space_set_region(BYTES,BITS) \
-static __inline void __CONCAT(bus_space_set_region_,BYTES) \
- (bus_space_tag_t, bus_space_handle_t, bus_size_t, \
- __PB_TYPENAME(BITS), size_t); \
- \
-static __inline void \
-__CONCAT(bus_space_set_region_,BYTES)( \
- bus_space_tag_t t, \
- bus_space_handle_t h, \
- bus_size_t o, \
- __PB_TYPENAME(BITS) v, \
- size_t c) \
-{ \
- \
- while (c--) { \
- __CONCAT(bus_space_write_,BYTES)(t, h, o, v); \
- o += BYTES; \
- } \
-}
-
-__PMAX_bus_space_set_region(1,8)
-__PMAX_bus_space_set_region(2,16)
-__PMAX_bus_space_set_region(4,32)
-
-#if 0 /* Cause a link error for bus_space_set_region_8 */
-#define bus_space_set_region_8 \
- !!! bus_space_set_region_8 unimplemented !!!
-#endif
-
-#undef __PMAX_bus_space_set_region
-
-/*
- * void bus_space_copy_region_N(bus_space_tag_t tag,
- * bus_space_handle_t bsh1, bus_size_t off1,
- * bus_space_handle_t bsh2, bus_size_t off2,
- * bus_size_t count);
- *
- * Copy `count' 1, 2, 4, or 8 byte values from bus space starting
- * at tag/bsh1/off1 to bus space starting at tag/bsh2/off2.
- */
-
-#define __PMAX_copy_region(BYTES) \
-static __inline void __CONCAT(bus_space_copy_region_,BYTES) \
- (bus_space_tag_t, \
- bus_space_handle_t bsh1, bus_size_t off1, \
- bus_space_handle_t bsh2, bus_size_t off2, \
- bus_size_t count); \
- \
-static __inline void \
-__CONCAT(bus_space_copy_region_,BYTES)( \
- bus_space_tag_t t, \
- bus_space_handle_t h1, bus_size_t o1, \
- bus_space_handle_t h2, bus_size_t o2, \
- bus_size_t c) \
-{ \
- bus_size_t o; \
- \
- if ((h1 + o1) >= (h2 + o2)) { \
- /* src after dest: copy forward */ \
- for (o = 0; c != 0; c--, o += BYTES) \
- __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \
- __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
- } else { \
- /* dest after src: copy backwards */ \
- for (o = (c - 1) * BYTES; c != 0; c--, o -= BYTES) \
- __CONCAT(bus_space_write_,BYTES)(t, h2, o2 + o, \
- __CONCAT(bus_space_read_,BYTES)(t, h1, o1 + o)); \
- } \
-}
-
-__PMAX_copy_region(1)
-__PMAX_copy_region(2)
-__PMAX_copy_region(4)
-
-#if 0 /* Cause a link error for bus_space_copy_region_8 */
-#define bus_space_copy_region_8 \
- !!! bus_space_copy_region_8 unimplemented !!!
-#endif
-
-#undef __PMAX_copy_region
-
-/*
- * Bus read/write barrier methods.
- *
- * void bus_space_barrier(bus_space_tag_t tag,
- * bus_space_handle_t bsh, bus_size_t offset,
- * bus_size_t len, int flags);
- *
- * On the MIPS, we just flush the write buffer.
- */
-#define bus_space_barrier(t, h, o, l, f) \
- ((void)((void)(t), (void)(h), (void)(o), (void)(l), (void)(f), \
- wbflush()))
-#define BUS_SPACE_BARRIER_READ 0x01 /* force read barrier */
-#define BUS_SPACE_BARRIER_WRITE 0x02 /* force write barrier */
-
-#undef __PB_TYPENAME_PREFIX
-#undef __PB_TYPENAME
-
-#define BUS_SPACE_ALIGNED_POINTER(p, t) ALIGNED_POINTER(p, t)
-
-/*
- * Flags used in various bus DMA methods.
- */
-#define BUS_DMA_WAITOK 0x000 /* safe to sleep (pseudo-flag) */
-#define BUS_DMA_NOWAIT 0x001 /* not safe to sleep */
-#define BUS_DMA_ALLOCNOW 0x002 /* perform resource allocation now */
-#define BUS_DMA_COHERENT 0x004 /* hint: map memory DMA coherent */
-#define BUS_DMA_STREAMING 0x008 /* hint: sequential, unidirectional */
-#define BUS_DMA_BUS1 0x010 /* placeholders for bus functions... */
-#define BUS_DMA_BUS2 0x020
-#define BUS_DMA_BUS3 0x040
-#define BUS_DMA_BUS4 0x080
-#define BUS_DMA_READ 0x100 /* mapping is device -> memory only */
-#define BUS_DMA_WRITE 0x200 /* mapping is memory -> device only */
-#define BUS_DMA_NOCACHE 0x400 /* hint: map non-cached memory */
-
-#define PMAX_DMAMAP_COHERENT 0x10000 /* no cache flush necessary on sync */
-
-/* Forwards needed by prototypes below. */
-struct mbuf;
-struct uio;
-
-/*
- * Operations performed by bus_dmamap_sync().
- */
-#define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */
-#define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */
-#define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */
-#define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */
-
-typedef struct pmax_bus_dma_tag *bus_dma_tag_t;
-typedef struct pmax_bus_dmamap *bus_dmamap_t;
-
-#define BUS_DMA_TAG_VALID(t) ((t) != (bus_dma_tag_t)0)
-
-/*
- * bus_dma_segment_t
- *
- * Describes a single contiguous DMA transaction. Values
- * are suitable for programming into DMA registers.
- */
-struct pmax_bus_dma_segment {
- bus_addr_t ds_addr; /* DMA address */
- bus_size_t ds_len; /* length of transfer */
- bus_addr_t _ds_vaddr; /* virtual address, 0 if invalid */
-};
-typedef struct pmax_bus_dma_segment bus_dma_segment_t;
-
-/*
- * bus_dma_tag_t
- *
- * A machine-dependent opaque type describing the implementation of
- * DMA for a given bus.
- */
-
-struct pmax_bus_dma_tag {
- /*
- * DMA mapping methods.
- */
- int (*_dmamap_create)(bus_dma_tag_t, bus_size_t, int,
- bus_size_t, bus_size_t, int, bus_dmamap_t *);
- void (*_dmamap_destroy)(bus_dma_tag_t, bus_dmamap_t);
- int (*_dmamap_load)(bus_dma_tag_t, bus_dmamap_t, void *,
- bus_size_t, struct proc *, int);
- int (*_dmamap_load_mbuf)(bus_dma_tag_t, bus_dmamap_t,
- struct mbuf *, int);
- int (*_dmamap_load_uio)(bus_dma_tag_t, bus_dmamap_t,
- struct uio *, int);
- int (*_dmamap_load_raw)(bus_dma_tag_t, bus_dmamap_t,
- bus_dma_segment_t *, int, bus_size_t, int);
- void (*_dmamap_unload)(bus_dma_tag_t, bus_dmamap_t);
- void (*_dmamap_sync)(bus_dma_tag_t, bus_dmamap_t,
- bus_addr_t, bus_size_t, int);
-
- /*
- * DMA memory utility functions.
- */
- int (*_dmamem_alloc)(bus_dma_tag_t, bus_size_t, bus_size_t,
- bus_size_t, bus_dma_segment_t *, int, int *, int);
- void (*_dmamem_free)(bus_dma_tag_t,
- bus_dma_segment_t *, int);
- int (*_dmamem_map)(bus_dma_tag_t, bus_dma_segment_t *,
- int, size_t, void **, int);
- void (*_dmamem_unmap)(bus_dma_tag_t, void *, size_t);
- paddr_t (*_dmamem_mmap)(bus_dma_tag_t, bus_dma_segment_t *,
- int, off_t, int, int);
-};
-
-#define bus_dmamap_create(t, s, n, m, b, f, p) \
- (*(t)->_dmamap_create)((t), (s), (n), (m), (b), (f), (p))
-#define bus_dmamap_destroy(t, p) \
- (*(t)->_dmamap_destroy)((t), (p))
-#define bus_dmamap_load(t, m, b, s, p, f) \
- (*(t)->_dmamap_load)((t), (m), (b), (s), (p), (f))
-#define bus_dmamap_load_mbuf(t, m, b, f) \
- (*(t)->_dmamap_load_mbuf)((t), (m), (b), (f))
-#define bus_dmamap_load_uio(t, m, u, f) \
- (*(t)->_dmamap_load_uio)((t), (m), (u), (f))
-#define bus_dmamap_load_raw(t, m, sg, n, s, f) \
- (*(t)->_dmamap_load_raw)((t), (m), (sg), (n), (s), (f))
-#define bus_dmamap_unload(t, p) \
- (*(t)->_dmamap_unload)((t), (p))
-#define bus_dmamap_sync(t, p, o, l, ops) \
- (*(t)->_dmamap_sync)((t), (p), (o), (l), (ops))
-
-#define bus_dmamem_alloc(t, s, a, b, sg, n, r, f) \
- (*(t)->_dmamem_alloc)((t), (s), (a), (b), (sg), (n), (r), (f))
-#define bus_dmamem_free(t, sg, n) \
- (*(t)->_dmamem_free)((t), (sg), (n))
-#define bus_dmamem_map(t, sg, n, s, k, f) \
- (*(t)->_dmamem_map)((t), (sg), (n), (s), (k), (f))
-#define bus_dmamem_unmap(t, k, s) \
- (*(t)->_dmamem_unmap)((t), (k), (s))
-#define bus_dmamem_mmap(t, sg, n, o, p, f) \
- (*(t)->_dmamem_mmap)((t), (sg), (n), (o), (p), (f))
-
-#define bus_dmatag_subregion(t, mna, mxa, nt, f) EOPNOTSUPP
-#define bus_dmatag_destroy(t)
-
-/*
- * bus_dmamap_t
- *
- * Describes a DMA mapping.
- */
-struct pmax_bus_dmamap {
- /*
- * PRIVATE MEMBERS: not for use my machine-independent code.
- */
- bus_size_t _dm_size; /* largest DMA transfer mappable */
- int _dm_segcnt; /* number of segs this map can map */
- bus_size_t _dm_maxmaxsegsz; /* fixed largest possible segment */
- bus_size_t _dm_boundary; /* don't cross this */
- int _dm_flags; /* misc. flags */
- struct vmspace *_dm_vmspace; /* vmspace that owns the mapping */
-
- /*
- * PUBLIC MEMBERS: these are used by machine-independent code.
- */
- bus_size_t dm_maxsegsz; /* largest possible segment */
- bus_size_t dm_mapsize; /* size of the mapping */
- int dm_nsegs; /* # valid segments in mapping */
- bus_dma_segment_t dm_segs[1]; /* segments; variable length */
-};
-
-#ifdef _PMAX_BUS_DMA_PRIVATE
-void pmax_bus_dma_init(void);
-
-int _bus_dmamap_create(bus_dma_tag_t, bus_size_t, int, bus_size_t,
- bus_size_t, int, bus_dmamap_t *);
-void _bus_dmamap_destroy(bus_dma_tag_t, bus_dmamap_t);
-int _bus_dmamap_load(bus_dma_tag_t, bus_dmamap_t, void *,
- bus_size_t, struct proc *, int);
-int _bus_dmamap_load_mbuf(bus_dma_tag_t, bus_dmamap_t,
- struct mbuf *, int);
-int _bus_dmamap_load_uio(bus_dma_tag_t, bus_dmamap_t,
- struct uio *, int);
-int _bus_dmamap_load_raw(bus_dma_tag_t, bus_dmamap_t,
- bus_dma_segment_t *, int, bus_size_t, int);
-void _bus_dmamap_unload(bus_dma_tag_t, bus_dmamap_t);
-void _bus_dmamap_sync_r3k(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
- bus_size_t, int);
-void _bus_dmamap_sync_r4k(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
- bus_size_t, int);
-
-int _bus_dmamem_alloc(bus_dma_tag_t tag, bus_size_t size,
- bus_size_t alignment, bus_size_t boundary,
- bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags);
-void _bus_dmamem_free(bus_dma_tag_t tag, bus_dma_segment_t *segs,
- int nsegs);
-int _bus_dmamem_map(bus_dma_tag_t tag, bus_dma_segment_t *segs,
- int nsegs, size_t size, void **kvap, int flags);
-void _bus_dmamem_unmap(bus_dma_tag_t tag, void *kva,
- size_t size);
-paddr_t _bus_dmamem_mmap(bus_dma_tag_t tag, bus_dma_segment_t *segs,
- int nsegs, off_t off, int prot, int flags);
-
-int _bus_dmamem_alloc_range(bus_dma_tag_t tag, bus_size_t size,
- bus_size_t alignment, bus_size_t boundary,
- bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags,
- vaddr_t low, vaddr_t high);
+#include <mips/bus_space_defs.h>
+#include <mips/bus_space_funcs.h>
+#include <mips/bus_dma_defs.h>
+#include <mips/bus_dma_funcs.h>
-extern struct pmax_bus_dma_tag pmax_default_bus_dma_tag;
-#endif /* _PMAX_BUS_DMA_PRIVATE */
+void pmax_bus_dma_init(void);
+extern bus_space_tag_t normal_memt;
+extern struct mips_bus_dma_tag pmax_default_bus_dma_tag;
#endif /* !_PMAX_BUS_H_ */
diff --git a/sys/arch/pmax/pmax/bus.c b/sys/arch/pmax/pmax/bus.c
new file mode 100644
index 0000000..c96a16c
--- /dev/null
+++ b/sys/arch/pmax/pmax/bus.c
@@ -0,0 +1,356 @@
+/* $NetBSD: bus.c,v 1.1 2016/11/16 19:37:06 macallan Exp $ */
+
+/*-
+ * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc.
+ * All rights reserved.
+ *
+ * This code is derived from software contributed to The NetBSD Foundation
+ * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
+ * NASA Ames Research Center.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
+ * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
+ * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+ * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
+ * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: bus.c,v 1.1 2016/11/16 19:37:06 macallan Exp $");
+
+#include "opt_cputype.h"
+
+#define _MIPS_BUS_DMA_PRIVATE
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/mbuf.h>
+#include <sys/proc.h>
+#include <sys/systm.h>
+
+#include <sys/bus.h>
+#include <machine/cpu.h>
+
+#include <uvm/uvm_extern.h>
+
+#include <mips/cpuregs.h>
+#include <mips/locore.h>
+#include <mips/cache.h>
+
+/*
+ * The default DMA tag for all busses on the DECstation.
+ */
+struct mips_bus_dma_tag pmax_default_bus_dma_tag = {
+ ._dmamap_ops = _BUS_DMAMAP_OPS_INITIALIZER,
+ ._dmamem_ops = _BUS_DMAMEM_OPS_INITIALIZER,
+ ._dmatag_ops = _BUS_DMATAG_OPS_INITIALIZER,
+};
+
+static void normal_bus_mem_init(bus_space_tag_t, void *);
+static void _bus_dmamap_sync_r3k(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
+ bus_size_t, int);
+#if 0
+static void _bus_dmamap_sync_r4k(bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
+ bus_size_t, int);
+#endif
+
+static struct mips_bus_space normal_mbst;
+bus_space_tag_t normal_memt = NULL;
+
+
+void
+pmax_bus_dma_init(void)
+{
+
+ normal_bus_mem_init(&normal_mbst, NULL);
+ normal_memt = &normal_mbst;
+
+#ifdef MIPS1
+ if (CPUISMIPS3 == 0)
+ pmax_default_bus_dma_tag._dmamap_ops.dmamap_sync = _bus_dmamap_sync_r3k;
+#endif
+#if 0
+ /* the common dmamap_sync() method should work on those */
+#ifdef MIPS3
+ if (CPUISMIPS3)
+ pmax_default_bus_dma_tag._dmamap_ops.dmamap_sync = _bus_dmamap_sync_r4k;
+#endif
+#endif
+}
+
+#ifdef MIPS1
+/*
+ * Common function for DMA map synchronization. May be called
+ * by chipset-specific DMA map synchronization functions.
+ *
+ * This is the R3000 version.
+ */
+static void
+_bus_dmamap_sync_r3k(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
+ bus_size_t len, int ops)
+{
+ bus_size_t minlen;
+ bus_addr_t addr;
+ int i;
+
+ /*
+ * Mixing PRE and POST operations is not allowed.
+ */
+ if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
+ (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
+ panic("_bus_dmamap_sync_r3k: mix PRE and POST");
+
+#ifdef DIAGNOSTIC
+ if (offset >= map->dm_mapsize)
+ panic("_bus_dmamap_sync_r3k: bad offset %lu (map size is %lu)",
+ offset, map->dm_mapsize);
+ if (len == 0 || (offset + len) > map->dm_mapsize)
+ panic("_bus_dmamap_sync_r3k: bad length");
+#endif
+
+ /*
+ * The R3000 cache is write-though. Therefore, we only need
+ * to drain the write buffer on PREWRITE. The cache is not
+ * coherent, however, so we need to invalidate the data cache
+ * on PREREAD (should we do it POSTREAD instead?).
+ *
+ * POSTWRITE (and POSTREAD, currently) are noops.
+ */
+
+ if (ops & BUS_DMASYNC_PREWRITE) {
+ /*
+ * Flush the write buffer.
+ */
+ wbflush();
+ }
+
+ /*
+ * If we're not doing PREREAD, nothing more to do.
+ */
+ if ((ops & BUS_DMASYNC_PREREAD) == 0)
+ return;
+
+ /*
+ * No cache invlidation is necessary if the DMA map covers
+ * COHERENT DMA-safe memory (which is mapped un-cached).
+ */
+ if (map->_dm_flags & _BUS_DMAMAP_COHERENT)
+ return;
+
+ /*
+ * If we are going to hit something as large or larger
+ * than the entire data cache, just nail the whole thing.
+ *
+ * NOTE: Even though this is `wbinv_all', since the cache is
+ * write-though, it just invalidates it.
+ */
+ if (len >= mips_cache_info.mci_pdcache_size) {
+ mips_dcache_wbinv_all();
+ return;
+ }
+
+ for (i = 0; i < map->dm_nsegs && len != 0; i++) {
+ /* Find the beginning segment. */
+ if (offset >= map->dm_segs[i].ds_len) {
+ offset -= map->dm_segs[i].ds_len;
+ continue;
+ }
+
+ /*
+ * Now at the first segment to sync; nail
+ * each segment until we have exhausted the
+ * length.
+ */
+ minlen = len < map->dm_segs[i].ds_len - offset ?
+ len : map->dm_segs[i].ds_len - offset;
+
+ addr = map->dm_segs[i].ds_addr;
+
+#ifdef BUS_DMA_DEBUG
+ printf("bus_dmamap_sync_r3k: flushing segment %d "
+ "(0x%lx..0x%lx) ...", i, addr + offset,
+ addr + offset + minlen - 1);
+#endif
+ mips_dcache_inv_range(
+ MIPS_PHYS_TO_KSEG0(addr + offset), minlen);
+#ifdef BUS_DMA_DEBUG
+ printf("\n");
+#endif
+ offset = 0;
+ len -= minlen;
+ }
+}
+#endif /* MIPS1 */
+
+#if 0
+#ifdef MIPS3
+/*
+ * Common function for DMA map synchronization. May be called
+ * by chipset-specific DMA map synchronization functions.
+ *
+ * This is the R4000 version.
+ */
+static void
+_bus_dmamap_sync_r4k(bus_dma_tag_t t, bus_dmamap_t map, bus_addr_t offset,
+ bus_size_t len, int ops)
+{
+ bus_size_t minlen;
+ bus_addr_t addr;
+ int i, useindex;
+
+ /*
+ * Mixing PRE and POST operations is not allowed.
+ */
+ if ((ops & (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE)) != 0 &&
+ (ops & (BUS_DMASYNC_POSTREAD|BUS_DMASYNC_POSTWRITE)) != 0)
+ panic("_bus_dmamap_sync_r4k: mix PRE and POST");
+
+#ifdef DIAGNOSTIC
+ if (offset >= map->dm_mapsize)
+ panic("_bus_dmamap_sync_r4k: bad offset %lu (map size is %lu)",
+ offset, map->dm_mapsize);
+ if (len == 0 || (offset + len) > map->dm_mapsize)
+ panic("_bus_dmamap_sync_r4k: bad length");
+#endif
+
+ /*
+ * The R4000 cache is virtually-indexed, write-back. This means
+ * we need to do the following things:
+ *
+ * PREREAD -- Invalidate D-cache. Note we might have
+ * to also write-back here if we have to use an Index
+ * op, or if the buffer start/end is not cache-line aligned.
+ *
+ * PREWRITE -- Write-back the D-cache. If we have to use
+ * an Index op, we also have to invalidate. Note that if
+ * we are doing PREREAD|PREWRITE, we can collapse everything
+ * into a single op.
+ *
+ * POSTREAD -- Nothing.
+ *
+ * POSTWRITE -- Nothing.
+ */
+
+ /*
+ * Flush the write buffer.
+ * XXX Is this always necessary?
+ */
+ wbflush();
+
+ ops &= (BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
+ if (ops == 0)
+ return;
+
+ /*
+ * If the mapping is of COHERENT DMA-safe memory, no cache
+ * flush is necessary.
+ */
+ if (map->_dm_flags & _BUS_DMAMAP_COHERENT)
+ return;
+
+ /*
+ * If the mapping belongs to the kernel, or if it belongs
+ * to the currently-running process (XXX actually, vmspace),
+ * then we can use Hit ops. Otherwise, Index ops.
+ *
+ * This should be true the vast majority of the time.
+ */
+ if (__predict_true(VMSPACE_IS_KERNEL_P(map->_dm_vmspace) ||
+ map->_dm_vmspace == curproc->p_vmspace))
+ useindex = 0;
+ else
+ useindex = 1;
+
+ for (i = 0; i < map->dm_nsegs && len != 0; i++) {
+ /* Find the beginning segment. */
+ if (offset >= map->dm_segs[i].ds_len) {
+ offset -= map->dm_segs[i].ds_len;
+ continue;
+ }
+
+ /*
+ * Now at the first segment to sync; nail
+ * each segment until we have exhausted the
+ * length.
+ */
+ minlen = len < map->dm_segs[i].ds_len - offset ?
+ len : map->dm_segs[i].ds_len - offset;
+
+ addr = map->dm_segs[i]._ds_vaddr;
+
+#ifdef BUS_DMA_DEBUG
+ printf("bus_dmamap_sync: flushing segment %d "
+ "(0x%lx..0x%lx) ...", i, addr + offset,
+ addr + offset + minlen - 1);
+#endif
+
+ /*
+ * If we are forced to use Index ops, it's always a
+ * Write-back,Invalidate, so just do one test.
+ */
+ if (__predict_false(useindex)) {
+ mips_dcache_wbinv_range_index(addr + offset, minlen);
+#ifdef BUS_DMA_DEBUG
+ printf("\n");
+#endif
+ offset = 0;
+ len -= minlen;
+ continue;
+ }
+
+ switch (ops) {
+ case BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE:
+ mips_dcache_wbinv_range(addr + offset, minlen);
+ break;
+
+ case BUS_DMASYNC_PREREAD:
+#if 1
+ mips_dcache_wbinv_range(addr + offset, minlen);
+#else
+ mips_dcache_inv_range(addr + offset, minlen);
+#endif
+ break;
+
+ case BUS_DMASYNC_PREWRITE:
+ mips_dcache_wb_range(addr + offset, minlen);
+ break;
+ }
+#ifdef BUS_DMA_DEBUG
+ printf("\n");
+#endif
+ offset = 0;
+ len -= minlen;
+ }
+}
+#endif /* MIPS3 */
+#endif
+
+/*
+ * XXX
+ * I have no idea what kind of limits to apply here, so for now allow
+ * everything
+ */
+
+#define CHIP normal
+#define CHIP_MEM /* defined */
+#define CHIP_W1_BUS_START(v) 0x00000000UL
+#define CHIP_W1_BUS_END(v) 0xffffffffUL
+#define CHIP_W1_SYS_START(v) 0x00000000UL
+#define CHIP_W1_SYS_END(v) 0xffffffffUL
+
+#include <mips/mips/bus_space_alignstride_chipdep.c>
diff --git a/sys/arch/pmax/tc/tcbus.c b/sys/arch/pmax/tc/tcbus.c
index 2555fe1..26b8a59 100644
--- a/sys/arch/pmax/tc/tcbus.c
+++ b/sys/arch/pmax/tc/tcbus.c
@@ -1,4 +1,4 @@
-/* $NetBSD: tcbus.c,v 1.30 2015/06/09 20:23:53 matt Exp $ */
+/* $NetBSD: tcbus.c,v 1.31 2016/11/16 19:37:06 macallan Exp $ */
/*-
* Copyright (c) 1999, 2000 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: tcbus.c,v 1.30 2015/06/09 20:23:53 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: tcbus.c,v 1.31 2016/11/16 19:37:06 macallan Exp $");
#define _PMAX_BUS_DMA_PRIVATE
/*
@@ -112,7 +112,7 @@ tcbus_attach(device_t parent, device_t self, void *aux)
}
tba->tba_busname = "tc";
- tba->tba_memt = 0;
+ tba->tba_memt = normal_memt;
tba->tba_intr_evcnt = tc_ds_intr_evcnt;
tba->tba_intr_establish = tc_ds_intr_establish;
tba->tba_intr_disestablish = tc_ds_intr_disestablish;
>How-To-Repeat:
Just build the NetBSD/pmax port from source and run the following command (replace the paths relative to your system):
/usr/pkg/bin/gxemul -vvvv -x -e 3max -d /extra/pmax.img /extra/pmax_temp/releasedir/pmax/binary/kernel/netbsd-GENERIC.gz
>Fix:
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