Hi, the patch will hardcode %al/ax/eax/rax for this kind of instruction.The result is that the cmp instruction will print the correct register name now.
As already stated in the PR, I'm not very confirmed with the intel/amd instruction set. So I cannot say if hardcoding to the "lower" set of register names is correct for all affected instructions - see list in orignal PR. The fact that either %rax or %r8 was already hardcoded before, the log message for the patch sounds reasonable, as long as there are no instructions that hardcode r8 somewhere and these are mapped to case "A" in the implementation too.
If this has been validated, I think this PR can be closed. Best regards W. Stukenbrock Matthias Drochner wrote:
The following reply was made to PR port-amd64/44405; it has been noted by GNATS. From: "Matthias Drochner" <drochner%netbsd.org@localhost> To: gnats-bugs%gnats.NetBSD.org@localhostCc: Subject: PR/44405 CVS commit: src/sys/arch/amd64/amd64Date: Fri, 18 Feb 2011 18:00:52 +0000 Module Name: src Committed By: drochner Date: Fri Feb 18 18:00:52 UTC 2011Modified Files:src/sys/arch/amd64/amd64: db_disasm.cLog Message:fix misinterpretation of REX prefixes where use of the accumulator as operand is hardwired into the instruction code, mostly from Wolfgang Stukenbrock per PR port-amd64/44405To generate a diff of this commit:cvs rdiff -u -r1.13 -r1.14 src/sys/arch/amd64/amd64/db_disasm.cPlease note that diffs are not public domain; they are subject to thecopyright notices on the relevant files.
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