NetBSD-Bugs archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
kern/44395: Request a bit patch for ale(4) driver.
>Number: 44395
>Category: kern
>Synopsis: Request a bit patch for ale(4) driver.
>Confidential: no
>Severity: non-critical
>Priority: low
>Responsible: kern-bug-people
>State: open
>Class: change-request
>Submitter-Id: net
>Arrival-Date: Sat Jan 15 15:45:00 +0000 2011
>Originator: Masanori Kanaoka
>Release: NetBSD 5.99.43/i386
>Organization:
>Environment:
NetBSD white.k.vnop.net 5.99.43 NetBSD 5.99.43 (GENERIC) #3: Sun Jan 16
00:01:17 JST 2011
root%white.k.vnop.net@localhost:/usr/obj/sys/arch/i386/compile/GENERIC i386
>Description:
Would you please apply a bit patch for ale(4) driver.
a bit patch include below:
- Fix register address in ale_phy_reset(). from linux
- Fix ale_flags(s/FASTETHER/JUMBO/) for L2E Rev. A. from linux
- Fix mask value in ale_stop_mac().
- Fix multicast handling. from openbsd
>How-To-Repeat:
>Fix:
Index: sys/dev/pci/if_ale.c
===================================================================
RCS file: /ftp/cvs/src/sys/dev/pci/if_ale.c,v
retrieving revision 1.12
diff -u -r1.12 if_ale.c
--- sys/dev/pci/if_ale.c 20 Jul 2010 09:17:24 -0000 1.12
+++ sys/dev/pci/if_ale.c 15 Jan 2011 14:49:48 -0000
@@ -367,12 +367,12 @@
ale_miibus_writereg(sc->sc_dev, sc->ale_phyaddr,
ATPHY_DBG_ADDR, 0x04);
ale_miibus_writereg(sc->sc_dev, sc->ale_phyaddr,
- ATPHY_DBG_ADDR, 0x8BBB);
+ ATPHY_DBG_DATA, 0x8BBB);
/* 10BT center tap voltage. */
ale_miibus_writereg(sc->sc_dev, sc->ale_phyaddr,
ATPHY_DBG_ADDR, 0x05);
ale_miibus_writereg(sc->sc_dev, sc->ale_phyaddr,
- ATPHY_DBG_ADDR, 0x2C46);
+ ATPHY_DBG_DATA, 0x2C46);
#undef ATPHY_DBG_ADDR
#undef ATPHY_DBG_DATA
@@ -461,7 +461,7 @@
chipname = "AR8121 (L1E)";
} else {
/* L2E Rev. A. AR8113 */
- sc->ale_flags |= ALE_FLAG_FASTETHER;
+ sc->ale_flags |= ALE_FLAG_JUMBO;
chipname = "AR8113 (L2E RevA)";
}
}
@@ -1910,7 +1910,7 @@
reg = CSR_READ_4(sc, ALE_MAC_CFG);
if ((reg & (MAC_CFG_TX_ENB | MAC_CFG_RX_ENB)) != 0) {
- reg &= ~MAC_CFG_TX_ENB | MAC_CFG_RX_ENB;
+ reg &= ~(MAC_CFG_TX_ENB | MAC_CFG_RX_ENB);
CSR_WRITE_4(sc, ALE_MAC_CFG, reg);
}
@@ -2015,7 +2015,7 @@
ETHER_FIRST_MULTI(step, ec, enm);
while (enm != NULL) {
- crc = ether_crc32_le(enm->enm_addrlo, ETHER_ADDR_LEN)
+ crc = ether_crc32_be(enm->enm_addrlo, ETHER_ADDR_LEN)
mchash[crc >> 31] |= 1 << ((crc >> 26) & 0x1f);
ETHER_NEXT_MULTI(step, enm);
}
Home |
Main Index |
Thread Index |
Old Index