Current-Users archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

Re: HEADS UP: Merging drm update



Hi,

On 2021/12/19 21:48, Taylor R Campbell wrote:
Date: Sun, 19 Dec 2021 01:42:53 +0000
From: Taylor R Campbell <riastradh%NetBSD.org@localhost>

Date: Sat, 18 Dec 2021 17:06:13 +0000
From: Taylor R Campbell <riastradh%NetBSD.org@localhost>

I'm planning to merge the drm update this weekend -- a cvs import and
merge commit, plus about 1300 commits on top of that from the git
repository.

The update is in progress, but my commitbomb script isn't perfect and
sometimes requires manual intervention, which won't happen while I'm
asleep.  The tree might not build for a few hours in that event.
Apologies in advance!

The commitbomb is done -- drm update merged.  There may be build
fallout; let me know if so and I'll try to take care of it.

GENERIC kernel without DIAGNOSTIC option fails to build.
Could you apply the following patch?
    https://github.com/knakahara/netbsd-src/commit/b1c93870ef5689201b6eb7e08811bc40e3e1543e

Here is the same patch.
====================
diff --git a/sys/external/bsd/drm2/dist/drm/i915/gt/intel_lrc.c b/sys/external/bsd/drm2/dist/drm/i915/gt/intel_lrc.c
index ac348156cd0..4464bc69dce 100644
--- a/sys/external/bsd/drm2/dist/drm/i915/gt/intel_lrc.c
+++ b/sys/external/bsd/drm2/dist/drm/i915/gt/intel_lrc.c
@@ -2248,7 +2248,7 @@ gen12_csb_parse(const struct intel_engine_execlists *execlists, const u32 *csb)
 {
 	u32 lower_dw = csb[0];
 	u32 upper_dw = csb[1];
-	bool ctx_to_valid = GEN12_CSB_CTX_VALID(lower_dw);
+	bool ctx_to_valid __diagused = GEN12_CSB_CTX_VALID(lower_dw);
 	bool ctx_away_valid = GEN12_CSB_CTX_VALID(upper_dw);
 	bool new_queue = lower_dw & GEN12_CTX_STATUS_SWITCHED_TO_NEW_QUEUE;
diff --git a/sys/external/bsd/drm2/dist/drm/i915/gt/intel_reset.c b/sys/external/bsd/drm2/dist/drm/i915/gt/intel_reset.c
index be7b47e3828..b0948d7b8e1 100644
--- a/sys/external/bsd/drm2/dist/drm/i915/gt/intel_reset.c
+++ b/sys/external/bsd/drm2/dist/drm/i915/gt/intel_reset.c
@@ -1120,7 +1120,7 @@ static inline int intel_gt_reset_engine(struct intel_engine_cs *engine)
  */
 int intel_engine_reset(struct intel_engine_cs *engine, const char *msg)
 {
-	struct intel_gt *gt = engine->gt;
+	struct intel_gt *gt __diagused = engine->gt;
 	bool uses_guc = intel_engine_in_guc_submission_mode(engine);
 	int ret;
diff --git a/sys/external/bsd/drm2/dist/drm/i915/gt/intel_ring_submission.c b/sys/external/bsd/drm2/dist/drm/i915/gt/intel_ring_submission.c
index 1becea96e4b..26e7d097dea 100644
--- a/sys/external/bsd/drm2/dist/drm/i915/gt/intel_ring_submission.c
+++ b/sys/external/bsd/drm2/dist/drm/i915/gt/intel_ring_submission.c
@@ -1946,7 +1946,7 @@ static void setup_bcs(struct intel_engine_cs *engine)
static void setup_vecs(struct intel_engine_cs *engine)
 {
-	struct drm_i915_private *i915 = engine->i915;
+	struct drm_i915_private *i915 __diagused = engine->i915;
GEM_BUG_ON(INTEL_GEN(i915) < 7); diff --git a/sys/external/bsd/drm2/dist/drm/i915/gt/uc/intel_guc_fw.c b/sys/external/bsd/drm2/dist/drm/i915/gt/uc/intel_guc_fw.c
index 33af59c0fab..440ecc6a9b7 100644
--- a/sys/external/bsd/drm2/dist/drm/i915/gt/uc/intel_guc_fw.c
+++ b/sys/external/bsd/drm2/dist/drm/i915/gt/uc/intel_guc_fw.c
@@ -64,7 +64,7 @@ static void guc_xfer_rsa(struct intel_uc_fw *guc_fw,
 			 struct intel_uncore *uncore)
 {
 	u32 rsa[UOS_RSA_SCRATCH_COUNT];
-	size_t copied;
+	size_t copied __diagused;
 	int i;
copied = intel_uc_fw_copy_rsa(guc_fw, rsa, sizeof(rsa));
diff --git a/sys/external/bsd/drm2/dist/drm/i915/gt/uc/intel_huc.c b/sys/external/bsd/drm2/dist/drm/i915/gt/uc/intel_huc.c
index 1bb5944efab..23d8fb22577 100644
--- a/sys/external/bsd/drm2/dist/drm/i915/gt/uc/intel_huc.c
+++ b/sys/external/bsd/drm2/dist/drm/i915/gt/uc/intel_huc.c
@@ -64,7 +64,7 @@ static int intel_huc_rsa_data_create(struct intel_huc *huc)
 	struct intel_gt *gt = huc_to_gt(huc);
 	struct intel_guc *guc = &gt->uc.guc;
 	struct i915_vma *vma;
-	size_t copied;
+	size_t copied __diagused;
 	void *vaddr;
 	int err;
diff --git a/sys/external/bsd/drm2/dist/drm/i915/i915_request.c b/sys/external/bsd/drm2/dist/drm/i915/i915_request.c
index e3ba11e16cc..9030365c689 100644
--- a/sys/external/bsd/drm2/dist/drm/i915/i915_request.c
+++ b/sys/external/bsd/drm2/dist/drm/i915/i915_request.c
@@ -1290,7 +1290,7 @@ __i915_request_add_to_timeline(struct i915_request *rq)
 struct i915_request *__i915_request_commit(struct i915_request *rq)
 {
 	struct intel_engine_cs *engine = rq->engine;
-	struct intel_ring *ring = rq->ring;
+	struct intel_ring *ring __diagused = rq->ring;
 	u32 *cs;
RQ_TRACE(rq, "\n");
diff --git a/sys/external/bsd/drm2/dist/drm/i915/i915_scheduler.c b/sys/external/bsd/drm2/dist/drm/i915/i915_scheduler.c
index 30e63daa6a6..af3489bbdc7 100644
--- a/sys/external/bsd/drm2/dist/drm/i915/i915_scheduler.c
+++ b/sys/external/bsd/drm2/dist/drm/i915/i915_scheduler.c
@@ -55,7 +55,7 @@ static inline struct i915_priolist *to_priolist(struct rb_node *rb)
 static void assert_priolists(struct intel_engine_execlists * const execlists)
 {
 	struct rb_node *rb;
-	long last_prio, i;
+	long last_prio __diagused, i;
if (!IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM))
 		return;
diff --git a/sys/external/bsd/drm2/i915drm/i915_pci_autoconf.c b/sys/external/bsd/drm2/i915drm/i915_pci_autoconf.c
index 3d0bc912ef4..9a8fd33809b 100644
--- a/sys/external/bsd/drm2/i915drm/i915_pci_autoconf.c
+++ b/sys/external/bsd/drm2/i915drm/i915_pci_autoconf.c
@@ -171,7 +171,7 @@ i915drmkms_attach_real(device_t self)
 	struct i915drmkms_softc *const sc = device_private(self);
 	struct pci_attach_args *const pa = &sc->sc_pa;
 	const struct pci_device_id *ent = i915drmkms_pci_lookup(pa);
-	const struct intel_device_info *const info = (struct intel_device_info *) ent->driver_data;
+	const struct intel_device_info *const info __diagused = (struct intel_device_info *) ent->driver_data;
 	int error;
KASSERT(info != NULL);

====================


Thanks,

--
//////////////////////////////////////////////////////////////////////
Internet Initiative Japan Inc.

Device Engineering Section,
Product Division,
Technology Unit

Kengo NAKAHARA <k-nakahara%iij.ad.jp@localhost>




Home | Main Index | Thread Index | Old Index