On 19.05.2019 17:33, Christos Zoulas wrote: > In article <76d02b7c-6408-1836-b247-0b5951c8acc9%gmx.com@localhost>, > Kamil Rytarowski <n54%gmx.com@localhost> wrote: >> -=-=-=-=-=- >> -=-=-=-=-=- >> >> On 18.05.2019 17:21, Martin Husemann wrote: >>> On Fri, May 17, 2019 at 12:15:16PM -0500, David Young wrote: >>>> On Fri, May 17, 2019 at 05:19:40PM +0100, Patrick Welche wrote: >>>>> What should one do about >>>>> >>>>> UBSan: Undefined Behavior in >> ../../../../external/bsd/acpica/dist/events/evregion.c:611:14, load of >> misaligned address 0xffffffff8302d4f3 for type 'const ACPI_NAME' which >> requires 4 byte alignment >>>>> UBSan: Undefined Behavior in >> ../../../../external/bsd/acpica/dist/resources/rsaddr.c:331:22, member >> access within misaligned address 0xffffe967d71420e2 for type 'union >> AML_RESOURCE' which requires 4 byte alignment >>> >>> Have not looked at those... >>> >>>>> UBSan: Undefined Behavior in >> ../../../../arch/x86/pci/pci_machdep.c:1134:15, member access within >> misaligned address 0xffffffff85a87c7c for type 'struct >> btinfo_framebuffer' which requires 8 byte alignment >>>> >>>> Supposing the authors really intended for the objects to be accessed in >>>> this way, label each declaration with __aligned(n) for some n? >>> >>> Since this code is in pci *machdep* and the behaviour is well defined for >>> those CPUs, just ignore it (or fix UBSan). >> >> Strictly speaking it's still UB and a compiler is allowed to miscompile >> it. x86 is also sensitive to alignment in certain operations (movaps vs >> movups; stack alignment, ...). >> >> My 80386 manual says that misalignment operations are slower than >> alignment ones on x86. > > I have already fixed it. And although misaligned access are slower than > aligned ones, the act of aligning them is even slower :-) > > christos > Thank you for the patch! We are working on pre-GSoC tasks now on cleaning the remaining UB warnings in the kernel. Our goal is to use kUBSan for kernel fuzzing (syzkaller and ideally TriforceAFL).
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