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Re: run(4) raspberry pi dongle
On Fri, Jan 13, 2017 at 11:15:24AM +0100, Patrick Welche wrote:
> I've had a go at supporting a "Raspberry Pi USB WiFi Dongle", which in this
> incarnation appears to be a
>
> run0: Ralink 802.11 n WLAN, rev 2.00/1.01, addr 6
> run0: MAC/BBP RT5390 (rev 0x0502), RF RT5370 (MIMO 1T1R), address 44:33:44:33:4f
That Pi remained in Belgium, so attached is the patch I was using.
Changes to if_runvar.h from
https://mail-index.netbsd.org/tech-net/2015/09/12/msg005356.html
I think this fixes an error in the current NetBSD driver:
@@ -1629,7 +1665,7 @@
sc->lna[2] = val >> 8; /* channel group 2 */
run_srom_read(sc, (sc->mac_ver != 0x3593) ? RT2860_EEPROM_RSSI1_5GHZ :
- RT3593_EEPROM_RSSI2_5GHZ, &val);
+ RT3593_EEPROM_RSSI1_5GHZ, &val);
sc->rssi_5ghz[0] = val & 0xff; /* Ant A */
sc->rssi_5ghz[1] = val >> 8; /* Ant B */
run_srom_read(sc, (sc->mac_ver != 0x3593) ? RT2860_EEPROM_RSSI2_5GHZ :
I didn't get my run(4) device to work, but I wonder if this breaks
currently working ones...
Cheers,
Patrick
Index: if_run.c
===================================================================
RCS file: /cvsroot/src/sys/dev/usb/if_run.c,v
retrieving revision 1.21
diff -u -r1.21 if_run.c
--- if_run.c 25 Nov 2016 12:56:29 -0000 1.21
+++ if_run.c 19 Jan 2017 07:53:18 -0000
@@ -18,7 +18,7 @@
*/
/*-
- * Ralink Technology RT2700U/RT2800U/RT3000U chipset driver.
+ * Ralink Technology RT2700U/RT2800U/RT3000U/RT3900E chipset driver.
* http://www.ralinktech.com/
*/
@@ -122,6 +122,8 @@
USB_ID(ASUSTEK, RT2870_5),
USB_ID(ASUSTEK, RT3070),
USB_ID(ASUSTEK, RT3070_1),
+ USB_ID(ASUSTEK, USBN53),
+ USB_ID(ASUSTEK, USBN66),
USB_ID(ASUSTEK2, USBN11),
USB_ID(AZUREWAVE, RT2870_1),
USB_ID(AZUREWAVE, RT2870_2),
@@ -138,6 +140,7 @@
USB_ID(BELKIN, F7D1101V2),
USB_ID(BELKIN, RT2870_1),
USB_ID(BELKIN, RT2870_2),
+ USB_ID(BELKIN, RTL8192CU_2),
USB_ID(BEWAN, RT3070),
USB_ID(CISCOLINKSYS, AE1000),
USB_ID(CISCOLINKSYS, AM10),
@@ -162,6 +165,10 @@
USB_ID(CYBERTAN, RT2870),
USB_ID(DLINK, RT2870),
USB_ID(DLINK, RT3072),
+ USB_ID(DLINK, DWA127),
+ USB_ID(DLINK, DWA140B3),
+ USB_ID(DLINK, DWA160B2),
+ USB_ID(DLINK, DWA162),
USB_ID(DLINK2, DWA130),
USB_ID(DLINK2, RT2870_1),
USB_ID(DLINK2, RT2870_2),
@@ -203,6 +210,9 @@
USB_ID(LINKSYS4, WUSB600N),
USB_ID(LINKSYS4, WUSB600NV2),
USB_ID(LOGITEC, LANW300NU2),
+ USB_ID(LOGITEC, LANW300NU2S),
+ USB_ID(LOGITEC, LAN_W300ANU2),
+ USB_ID(LOGITEC, LAN_W450ANU2E),
USB_ID(LOGITEC, RT2870_1),
USB_ID(LOGITEC, RT2870_2),
USB_ID(LOGITEC, RT2870_3),
@@ -257,6 +267,8 @@
USB_ID(RALINK, RT3072),
USB_ID(RALINK, RT3370),
USB_ID(RALINK, RT3572),
+ USB_ID(RALINK, RT3573),
+ USB_ID(RALINK, RT5370),
USB_ID(RALINK, RT5572),
USB_ID(RALINK, RT8070),
USB_ID(SAMSUNG, RT2870_1),
@@ -275,9 +287,11 @@
USB_ID(SITECOMEU, RT2870_2),
USB_ID(SITECOMEU, RT2870_3),
USB_ID(SITECOMEU, RT3070_1),
+ USB_ID(SITECOMEU, RT3070_3),
USB_ID(SITECOMEU, RT3072_3),
USB_ID(SITECOMEU, RT3072_4),
USB_ID(SITECOMEU, RT3072_5),
+ USB_ID(SITECOMEU, RT3072_6),
USB_ID(SITECOMEU, WL302),
USB_ID(SITECOMEU, WL315),
USB_ID(SITECOMEU, WL321),
@@ -310,7 +324,7 @@
USB_ID(ZYXEL, NWD211AN),
USB_ID(ZYXEL, RT2870_1),
USB_ID(ZYXEL, RT2870_2),
- USB_ID(ZYXEL, RT3070),
+ USB_ID(ZYXEL, RT3070)
};
static int run_match(device_t, cfdata_t, void *);
@@ -351,7 +365,7 @@
static int run_bbp_read(struct run_softc *, uint8_t, uint8_t *);
static int run_bbp_write(struct run_softc *, uint8_t, uint8_t);
static int run_mcu_cmd(struct run_softc *, uint8_t, uint16_t);
-static const char * run_get_rf(int);
+static const char * run_get_rf(uint16_t);
static void run_rt3593_get_txpower(struct run_softc *);
static void run_get_txpower(struct run_softc *);
static int run_read_eeprom(struct run_softc *);
@@ -441,9 +455,9 @@
uint8_t val;
} rt2860_def_bbp[] = {
RT2860_DEF_BBP
-}, rt5390_def_bbp[] = {
+},rt5390_def_bbp[] = {
RT5390_DEF_BBP
-}, rt5592_def_bbp[] = {
+},rt5592_def_bbp[] = {
RT5592_DEF_BBP
};
@@ -489,16 +503,16 @@
uint8_t val;
} rt3070_def_rf[] = {
RT3070_DEF_RF
-}, rt3572_def_rf[] = {
+},rt3572_def_rf[] = {
RT3572_DEF_RF
},rt3593_def_rf[] = {
RT3593_DEF_RF
-},rt5390_def_rf[] = {
- RT5390_DEF_RF
-},rt5392_def_rf[] = {
- RT5392_DEF_RF
-},rt5592_def_rf[] = {
- RT5592_DEF_RF
+},rt5390_def_rf[] = {
+ RT5390_DEF_RF
+},rt5392_def_rf[] = {
+ RT5392_DEF_RF
+},rt5592_def_rf[] = {
+ RT5592_DEF_RF
},rt5592_2ghz_def_rf[] = {
RT5592_2GHZ_DEF_RF
},rt5592_5ghz_def_rf[] = {
@@ -846,6 +860,11 @@
{
struct run_tx_ring *txq = &sc->txq[qid];
int i, error;
+ uint16_t txwisize;
+
+ txwisize = sizeof(struct rt2860_txwi);
+ if (sc->mac_ver == 0x5592)
+ txwisize += sizeof(uint32_t);
txq->cur = txq->queued = 0;
@@ -866,8 +885,7 @@
data->buf = usbd_get_buffer(data->xfer);
/* zeroize the TXD + TXWI part */
- memset(data->buf, 0, sizeof(struct rt2870_txd) +
- sizeof(struct rt2860_txwi));
+ memset(data->buf, 0, sizeof(struct rt2870_txd) + txwisize);
}
if (error != 0)
fail: run_free_tx_ring(sc, qid);
@@ -938,7 +956,9 @@
return error;
usbd_delay_ms(sc->sc_udev, 10);
+ run_write(sc, RT2860_H2M_BBPAGENT, 0);
run_write(sc, RT2860_H2M_MAILBOX, 0);
+ run_write(sc, RT2860_H2M_INTSRC, 0);
if ((error = run_mcu_cmd(sc, RT2860_MCU_CMD_RFRESET, 0)) != 0)
return error;
@@ -1311,7 +1331,7 @@
}
static const char *
-run_get_rf(int rev)
+run_get_rf(uint16_t rev)
{
switch (rev) {
case RT2860_RF_2820: return "RT2820";
@@ -1483,21 +1503,27 @@
ic->ic_myaddr[4] = val & 0xff;
ic->ic_myaddr[5] = val >> 8;
- /* read vendor BBP settings */
- for (i = 0; i < 10; i++) {
- run_srom_read(sc, RT2860_EEPROM_BBP_BASE + i, &val);
- sc->bbp[i].val = val & 0xff;
- sc->bbp[i].reg = val >> 8;
- DPRINTF(("BBP%d=0x%02x\n", sc->bbp[i].reg, sc->bbp[i].val));
- }
-
- /* read vendor RF settings */
- for (i = 0; i < 8; i++) {
- run_srom_read(sc, RT3071_EEPROM_RF_BASE + i, &val);
- sc->rf[i].val = val & 0xff;
- sc->rf[i].reg = val >> 8;
- DPRINTF(("RF%d=0x%02x\n", sc->rf[i].reg,
- sc->rf[i].val));
+ if (sc->mac_ver < 0x3593 ) {
+ /* read vendor BBP settings */
+ for (i = 0; i < 10; i++) {
+ run_srom_read(sc, RT2860_EEPROM_BBP_BASE + i, &val);
+ sc->bbp[i].val = val & 0xff;
+ sc->bbp[i].reg = val >> 8;
+ DPRINTF(("BBP%d=0x%02x\n", sc->bbp[i].reg,
+ sc->bbp[i].val));
+ }
+
+ if (sc->mac_ver >= 0x3071) {
+ /* read vendor RF settings */
+ for (i = 0; i < 8; i++) { /* XXX i < 10 in FreeBSD */
+ run_srom_read(sc, RT3071_EEPROM_RF_BASE + i,
+ &val);
+ sc->rf[i].val = val & 0xff;
+ sc->rf[i].reg = val >> 8;
+ DPRINTF(("RF%d=0x%02x\n", sc->rf[i].reg,
+ sc->rf[i].val));
+ }
+ }
}
/* read RF frequency offset from EEPROM */
@@ -1522,7 +1548,10 @@
sc->leds, sc->led[0], sc->led[1], sc->led[2]));
/* read RF information */
- run_srom_read(sc, RT2860_EEPROM_ANTENNA, &val);
+ if (sc->mac_ver == 0x5390 || sc->mac_ver == 0x5392)
+ run_srom_read(sc, 0x00, &val);
+ else
+ run_srom_read(sc, RT2860_EEPROM_ANTENNA, &val);
if (val == 0xffff) {
DPRINTF(("invalid EEPROM antenna info, using default\n"));
if (sc->mac_ver == 0x3572) {
@@ -1542,11 +1571,15 @@
sc->nrxchains = 2;
}
} else {
- sc->rf_rev = (val >> 8) & 0xf;
+ if (sc->mac_ver == 0x5390 || sc->mac_ver == 0x5392) {
+ sc->rf_rev = val;
+ run_srom_read(sc, RT2860_EEPROM_ANTENNA, &val);
+ } else
+ sc->rf_rev = (val >> 8) & 0xf;
sc->ntxchains = (val >> 4) & 0xf;
sc->nrxchains = val & 0xf;
}
- DPRINTF(("EEPROM RF rev=0x%02x chains=%dT%dR\n",
+ DPRINTF(("EEPROM RF rev=0x%04x chains=%dT%dR\n",
sc->rf_rev, sc->ntxchains, sc->nrxchains));
run_srom_read(sc, RT2860_EEPROM_CONFIG, &val);
@@ -1603,11 +1636,14 @@
sc->txpow40mhz_2ghz[ridx], sc->txpow40mhz_5ghz[ridx]));
}
+ DPRINTF(("mac_ver %hx\n", sc->mac_ver));
/* read RSSI offsets and LNA gains from EEPROM */
- run_srom_read(sc, RT2860_EEPROM_RSSI1_2GHZ, &val);
+ run_srom_read(sc, (sc->mac_ver != 0x3593) ? RT2860_EEPROM_RSSI1_2GHZ :
+ RT3593_EEPROM_RSSI1_2GHZ, &val);
sc->rssi_2ghz[0] = val & 0xff; /* Ant A */
sc->rssi_2ghz[1] = val >> 8; /* Ant B */
- run_srom_read(sc, RT2860_EEPROM_RSSI2_2GHZ, &val);
+ run_srom_read(sc, (sc->mac_ver != 0x3593) ? RT2860_EEPROM_RSSI2_2GHZ :
+ RT3593_EEPROM_RSSI2_2GHZ, &val);
if (sc->mac_ver >= 0x3070) {
if (sc->mac_ver == 0x3593) {
sc->txmixgain_2ghz = 0;
@@ -1629,7 +1665,7 @@
sc->lna[2] = val >> 8; /* channel group 2 */
run_srom_read(sc, (sc->mac_ver != 0x3593) ? RT2860_EEPROM_RSSI1_5GHZ :
- RT3593_EEPROM_RSSI2_5GHZ, &val);
+ RT3593_EEPROM_RSSI1_5GHZ, &val);
sc->rssi_5ghz[0] = val & 0xff; /* Ant A */
sc->rssi_5ghz[1] = val >> 8; /* Ant B */
run_srom_read(sc, (sc->mac_ver != 0x3593) ? RT2860_EEPROM_RSSI2_5GHZ :
@@ -2484,13 +2520,13 @@
txd->flags = RT2860_TX_QSEL_EDCA;
txd->len = htole16(xferlen);
- /*
+ /*
* Ether both are true or both are false, the header
* are nicely aligned to 32-bit. So, no L2 padding.
- */
+ */
if (IEEE80211_HAS_ADDR4(wh) == IEEE80211_QOS_HAS_SEQ(wh))
pad = 0;
- else
+ else
pad = 2;
/* setup TX Wireless Information */
@@ -2715,21 +2751,73 @@
run_bbp_write(sc, 62, 0x37 - sc->lna[group]);
run_bbp_write(sc, 63, 0x37 - sc->lna[group]);
run_bbp_write(sc, 64, 0x37 - sc->lna[group]);
- run_bbp_write(sc, 86, 0x00);
+ if (sc->mac_ver < 0x3572)
+ run_bbp_write(sc, 86, 0x00);
+
+ if (sc->mac_ver == 0x3593) {
+ run_bbp_write(sc, 77, 0x98);
+ run_bbp_write(sc, 83, (group == 0) ? 0x8a : 0x9a);
+ }
if (group == 0) {
if (sc->ext_2ghz_lna) {
- run_bbp_write(sc, 82, 0x62);
- run_bbp_write(sc, 75, 0x46);
+ if (sc->mac_ver >= 0x5390)
+ run_bbp_write(sc, 75, 0x52);
+ else {
+ run_bbp_write(sc, 82, 0x62);
+ run_bbp_write(sc, 75, 0x46);
+ }
} else {
- run_bbp_write(sc, 82, 0x84);
- run_bbp_write(sc, 75, 0x50);
+ if (sc->mac_ver == 0x5592) {
+ run_bbp_write(sc, 79, 0x1c);
+ run_bbp_write(sc, 80, 0x0e);
+ run_bbp_write(sc, 81, 0x3a);
+ run_bbp_write(sc, 82, 0x62);
+
+ run_bbp_write(sc, 195, 0x80);
+ run_bbp_write(sc, 196, 0xe0);
+ run_bbp_write(sc, 195, 0x81);
+ run_bbp_write(sc, 196, 0x1f);
+ run_bbp_write(sc, 195, 0x82);
+ run_bbp_write(sc, 196, 0x38);
+ run_bbp_write(sc, 195, 0x83);
+ run_bbp_write(sc, 196, 0x32);
+ run_bbp_write(sc, 195, 0x85);
+ run_bbp_write(sc, 196, 0x28);
+ run_bbp_write(sc, 195, 0x86);
+ run_bbp_write(sc, 196, 0x19);
+ } else if (sc->mac_ver >= 0x5390)
+ run_bbp_write(sc, 75, 0x50);
+ else {
+ run_bbp_write(sc, 82,
+ (sc->mac_ver == 0x3593) ? 0x62 : 0x84);
+ run_bbp_write(sc, 75, 0x50);
+ }
}
} else {
- if (sc->mac_ver == 0x3572)
+ if (sc->mac_ver == 0x5592) {
+ run_bbp_write(sc, 79, 0x18);
+ run_bbp_write(sc, 80, 0x08);
+ run_bbp_write(sc, 81, 0x38);
+ run_bbp_write(sc, 82, 0x92);
+
+ run_bbp_write(sc, 195, 0x80);
+ run_bbp_write(sc, 196, 0xf0);
+ run_bbp_write(sc, 195, 0x81);
+ run_bbp_write(sc, 196, 0x1e);
+ run_bbp_write(sc, 195, 0x82);
+ run_bbp_write(sc, 196, 0x28);
+ run_bbp_write(sc, 195, 0x83);
+ run_bbp_write(sc, 196, 0x20);
+ run_bbp_write(sc, 195, 0x85);
+ run_bbp_write(sc, 196, 0x7f);
+ run_bbp_write(sc, 195, 0x86);
+ run_bbp_write(sc, 196, 0x7f);
+ } else if (sc->mac_ver == 0x3572)
run_bbp_write(sc, 82, 0x94);
else
- run_bbp_write(sc, 82, 0xf2);
+ run_bbp_write(sc, 82,
+ (sc->mac_ver == 0x3593) ? 0x82 : 0xf2);
if (sc->ext_5ghz_lna)
run_bbp_write(sc, 75, 0x46);
else
@@ -2743,12 +2831,18 @@
/* enable appropriate Power Amplifiers and Low Noise Amplifiers */
tmp = RT2860_RFTR_EN | RT2860_TRSW_EN | RT2860_LNA_PE0_EN;
+ if (sc->mac_ver == 0x3593)
+ tmp |= 1 << 29 | 1 << 28;
if (sc->nrxchains > 1)
tmp |= RT2860_LNA_PE1_EN;
if (group == 0) { /* 2GHz */
tmp |= RT2860_PA_PE_G0_EN;
if (sc->ntxchains > 1)
tmp |= RT2860_PA_PE_G1_EN;
+ if (sc->mac_ver == 0x3593) {
+ if (sc->ntxchains > 2)
+ tmp |= 1 << 25;
+ }
} else { /* 5GHz */
tmp |= RT2860_PA_PE_A0_EN;
if (sc->ntxchains > 1)
@@ -2761,6 +2855,20 @@
} else
run_write(sc, RT2860_TX_PIN_CFG, tmp);
+ if (sc->mac_ver == 0x5592) {
+ run_bbp_write(sc, 195, 0x8d);
+ run_bbp_write(sc, 196, 0x1a);
+ }
+
+ if (sc->mac_ver == 0x3593) {
+ run_read(sc, RT2860_GPIO_CTRL, &tmp);
+ tmp &= ~0x01010000;
+ if (group == 0)
+ tmp |= 0x00010000;
+ tmp = (tmp & ~0x00009090) | 0x00000090;
+ run_write(sc, RT2860_GPIO_CTRL, tmp);
+ }
+
/* set initial AGC value */
if (group == 0) { /* 2GHz band */
if (sc->mac_ver >= 0x3070)
@@ -3574,19 +3682,24 @@
uint32_t tmp;
uint8_t bbp152;
- if (sc->rf_rev == RT5390_RF_5370) {
- run_bbp_read(sc, 152, &bbp152);
- bbp152 &= ~0x80;
- if (aux)
- bbp152 |= 0x80;
- run_bbp_write(sc, 152, bbp152);
+ if (aux) {
+ if (sc->rf_rev == RT5390_RF_5370) {
+ run_bbp_read(sc, 152, &bbp152);
+ run_bbp_write(sc, 152, bbp152 & ~0x80);
+ } else {
+ run_mcu_cmd(sc, RT2860_MCU_CMD_ANTSEL, 0);
+ run_read(sc, RT2860_GPIO_CTRL, &tmp);
+ run_write(sc, RT2860_GPIO_CTRL, (tmp & ~0x0808) | 0x08);
+ }
} else {
- run_mcu_cmd(sc, RT2860_MCU_CMD_ANTSEL, !aux);
- run_read(sc, RT2860_GPIO_CTRL, &tmp);
- tmp &= ~0x0808;
- if (aux)
- tmp |= 0x08;
- run_write(sc, RT2860_GPIO_CTRL, tmp);
+ if (sc->rf_rev == RT5390_RF_5370) {
+ run_bbp_read(sc, 152, &bbp152);
+ run_bbp_write(sc, 152, bbp152 | 0x80);
+ } else {
+ run_mcu_cmd(sc, RT2860_MCU_CMD_ANTSEL, 1);
+ run_read(sc, RT2860_GPIO_CTRL, &tmp);
+ run_write(sc, RT2860_GPIO_CTRL, tmp & ~0x0808);
+ }
}
}
@@ -3629,8 +3742,8 @@
usbd_delay_ms(sc->sc_udev, 10);
/* Perform IQ calibration. */
- if (sc->mac_ver >= 0x5392)
- run_iq_calib(sc, chan);
+ if (sc->mac_ver >= 0x5392)
+ run_iq_calib(sc, chan);
return 0;
}
@@ -3638,7 +3751,7 @@
static void
run_updateprot(struct run_softc *sc)
{
- struct ieee80211com *ic = &sc->sc_ic;
+ struct ieee80211com *ic = &sc->sc_ic;
uint32_t tmp;
tmp = RT2860_RTSTH_EN | RT2860_PROT_NAV_SHORT | RT2860_TXOP_ALLOW_ALL;
@@ -3815,7 +3928,7 @@
return -12 - delta - rssi;
}
-static void
+static void
run_rt5390_bbp_init(struct run_softc *sc)
{
u_int i;
@@ -3838,26 +3951,26 @@
for (i = 0; i < (int)__arraycount(rt5592_bbp_r196); i++) {
run_bbp_write(sc, 195, i + 0x80);
run_bbp_write(sc, 196, rt5592_bbp_r196[i]);
- }
- } else {
+ }
+ } else {
for (i = 0; i < (int)__arraycount(rt5390_def_bbp); i++) {
run_bbp_write(sc, rt5390_def_bbp[i].reg,
rt5390_def_bbp[i].val);
- }
- }
+ }
+ }
if (sc->mac_ver == 0x5392) {
- run_bbp_write(sc, 88, 0x90);
- run_bbp_write(sc, 95, 0x9a);
- run_bbp_write(sc, 98, 0x12);
+ run_bbp_write(sc, 88, 0x90);
+ run_bbp_write(sc, 95, 0x9a);
+ run_bbp_write(sc, 98, 0x12);
run_bbp_write(sc, 106, 0x12);
run_bbp_write(sc, 134, 0xd0);
run_bbp_write(sc, 135, 0xf6);
run_bbp_write(sc, 148, 0x84);
- }
-
+ }
+
run_bbp_read(sc, 152, &bbp);
run_bbp_write(sc, 152, bbp | 0x80);
-
+
/* Fix BBP254 for RT5592C. */
if (sc->mac_ver == 0x5592 && sc->mac_rev >= 0x0221) {
run_bbp_read(sc, 254, &bbp);
@@ -3911,7 +4024,8 @@
if (sc->mac_ver == 0x2860 && sc->mac_rev != 0x0101)
run_bbp_write(sc, 84, 0x19);
- if (sc->mac_ver >= 0x3070) {
+ if (sc->mac_ver >= 0x3070 && (sc->mac_ver != 0x3593 &&
+ sc->mac_ver != 0x5592)) {
run_bbp_write(sc, 79, 0x13);
run_bbp_write(sc, 80, 0x05);
run_bbp_write(sc, 81, 0x33);
@@ -3975,8 +4089,12 @@
/* patch LNA_PE_G1 */
run_read(sc, RT3070_GPIO_SWITCH, &tmp);
run_write(sc, RT3070_GPIO_SWITCH, tmp & ~0x20);
- } else if (sc->mac_ver == 0x3070) {
- /* increase voltage from 1.2V to 1.35V */
+ } else if (sc->mac_ver == 0x3070 && sc->mac_rev < 0x0201) {
+ /*
+ * Change voltage from 1.2V to 1.35V for RT3070.
+ * The DAC issue (RT3070_LDO_CFG0) has been fixed
+ * in RT3070(F).
+ */
run_read(sc, RT3070_LDO_CFG0, &tmp);
tmp = (tmp & ~0x0f000000) | 0x0d000000;
run_write(sc, RT3070_LDO_CFG0, tmp);
@@ -4311,14 +4429,14 @@
}
}
-static void
+static void
run_rt3593_rf_setup(struct run_softc *sc)
{
uint8_t bbp, rf;
if (sc->mac_rev >= 0x0211) {
/* Enable DC filter. */
- run_bbp_write(sc, 103, 0xc0);
+ run_bbp_write(sc, 103, 0xc0);
}
run_write(sc, RT2860_TX_SW_CFG1, 0);
if (sc->mac_rev < 0x0211) {
@@ -4326,22 +4444,22 @@
sc->patch_dac ? 0x2c : 0x0f);
} else
run_write(sc, RT2860_TX_SW_CFG2, 0);
-
+
run_rt3070_rf_read(sc, 50, &rf);
run_rt3070_rf_write(sc, 50, rf & ~RT3593_TX_LO2);
run_rt3070_rf_read(sc, 51, &rf);
rf = (rf & ~(RT3593_TX_LO1 | 0x0c)) |
- ((sc->txmixgain_2ghz & 0x07) << 2);
+ ((sc->txmixgain_2ghz & 0x07) << 2);
run_rt3070_rf_write(sc, 51, rf);
-
+
run_rt3070_rf_read(sc, 38, &rf);
run_rt3070_rf_write(sc, 38, rf & ~RT5390_RX_LO1);
-
+
run_rt3070_rf_read(sc, 39, &rf);
run_rt3070_rf_write(sc, 39, rf & ~RT5390_RX_LO2);
- run_rt3070_rf_read(sc, 1, &rf);
+ run_rt3070_rf_read(sc, 1, &rf);
run_rt3070_rf_write(sc, 1, rf & ~(RT3070_RF_BLOCK | RT3070_PLL_PD));
run_rt3070_rf_read(sc, 30, &rf);
@@ -4352,7 +4470,7 @@
run_bbp_read(sc, 105, &bbp);
if (sc->nrxchains > 1)
run_bbp_write(sc, 105, bbp | RT5390_MLD);
-
+
/* Avoid data lost and CRC error. */
run_bbp_read(sc, 4, &bbp);
run_bbp_write(sc, 4, bbp | RT5390_MAC_IF_CTRL);
@@ -4661,7 +4779,7 @@
/* write vendor-specific BBP values (from EEPROM) */
if (sc->mac_ver < 0x3593) {
- for (i = 0; i < 10; i++) {
+ for (i = 0; i < 10; i++) { /* XXX OpenBSD has 8, FreeBSD has 10 */
if (sc->bbp[i].reg == 0 || sc->bbp[i].reg == 0xff)
continue;
run_bbp_write(sc, sc->bbp[i].reg, sc->bbp[i].val);
Index: if_runvar.h
===================================================================
RCS file: /cvsroot/src/sys/dev/usb/if_runvar.h,v
retrieving revision 1.3
diff -u -r1.3 if_runvar.h
--- if_runvar.h 16 Sep 2016 09:25:30 -0000 1.3
+++ if_runvar.h 19 Jan 2017 07:53:18 -0000
@@ -29,7 +29,7 @@
/* NB: "11" is the maximum number of padding bytes needed for Tx */
#define RUN_MAX_TXSZ \
(sizeof(struct rt2870_txd) + \
- sizeof(struct rt2860_rxwi) + \
+ sizeof(struct rt2860_txwi) + \
MCLBYTES + 11)
#define RUN_TX_TIMEOUT 5000 /* ms */
@@ -37,7 +37,7 @@
#define RUN_RX_RING_COUNT 1
#define RUN_TX_RING_COUNT 8
-#define RT2870_WCID_MAX 253
+#define RT2870_WCID_MAX 64
#define RUN_AID2WCID(aid) ((aid) & 0xff)
struct run_rx_radiotap_header {
Index: xhci.c
===================================================================
RCS file: /cvsroot/src/sys/dev/usb/xhci.c,v
retrieving revision 1.67
diff -u -r1.67 xhci.c
--- xhci.c 3 Sep 2016 12:07:41 -0000 1.67
+++ xhci.c 19 Jan 2017 07:53:18 -0000
@@ -73,7 +73,7 @@
#ifndef XHCI_DEBUG
#define xhcidebug 0
#else /* !XHCI_DEBUG */
-static int xhcidebug = 0;
+static int xhcidebug = 10;
SYSCTL_SETUP(sysctl_hw_xhci_setup, "sysctl hw.xhci setup")
{
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