Re: wm MDIC write error

[Masanobu SAITOH <msaitoh%execsw.org@localhost>]

Hi, Mark.

(2013/06/14 12:31), Masanobu SAITOH wrote:
> (2013/06/13 10:37), Masanobu SAITOH wrote:
> > Hello, Mark.
> >
> > (2013/06/13 10:30), Mark Davies wrote:
> > > Hi,
> > >     I have a 6.0_STABLE/i386 (almost 6.1) box with an onboard PCH2 LAN
> > > 82579LM (wm0) and an Intel i82574L on a PCIe card (wm1)
> > >
> > > When I first boot the machine both network ports work fine but after a
> > > while wm1 stops and I get lots of the following logged:
> > >
> > >            [...]
> > > wm1: MDIC write error: phy 1 reg 0
> > > wm1: MDIC write error: phy 1 reg 4
> > > wm1: MDIC write error: phy 1 reg 9
> > > wm1: MDIC write error: phy 1 reg 0
>
>   It's wm1, so not 82579LM but 82574L. Anyway, I'll test with my boxes.
>
>   Regards.
>
>
> > >            [...]
> > >
> > > Need to powercycle the machine to get it working again.
> > >
> > > Anybody know whats broken here?  Have a fix? (in current?)
> > >
> > > cheers
> > > mark
> >
> >   I've never seen the problem with my own 82579 system, but I saw the same error
> > a few days ago with I217LM in -current. The problem is reproducable, so I'll
> > try to fix it.
> >
> >   Regards.

 This problem is reproduceable, right?

 Could you test the following patch? This patch is for -current, but it can 
apply
to netbsd-6, too.

Index: if_wm.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/if_wm.c,v
retrieving revision 1.258
diff -u -r1.258 if_wm.c
--- if_wm.c     19 Jun 2013 10:53:24 -0000      1.258
+++ if_wm.c     21 Jun 2013 08:37:40 -0000
@@ -570,6 +570,8 @@
 static void    wm_put_swfw_semaphore(struct wm_softc *, uint16_t);
 static int     wm_get_swfwhw_semaphore(struct wm_softc *);
 static void    wm_put_swfwhw_semaphore(struct wm_softc *);
+static int     wm_get_hw_semaphore_82573(struct wm_softc *);
+static void    wm_put_hw_semaphore_82573(struct wm_softc *);
 
 static int	wm_read_eeprom_ich8(struct wm_softc *, int, int, uint16_t *);
 static int32_t wm_ich8_cycle_init(struct wm_softc *);
@@ -4018,7 +4020,6 @@
 {
        int phy_reset = 0;
        uint32_t reg, mask;
-       int i;
 
 	/*
         * Allocate on-chip memory according to the MTU size.
@@ -4118,19 +4119,7 @@
        case WM_T_82573:
        case WM_T_82574:
        case WM_T_82583:
-               i = 0;
-               reg = CSR_READ(sc, WMREG_EXTCNFCTR)
-                   | EXTCNFCTR_MDIO_SW_OWNERSHIP;
-               do {
-                       CSR_WRITE(sc, WMREG_EXTCNFCTR,
-                           reg | EXTCNFCTR_MDIO_SW_OWNERSHIP);
-                       reg = CSR_READ(sc, WMREG_EXTCNFCTR);
-                       if ((reg & EXTCNFCTR_MDIO_SW_OWNERSHIP) != 0)
-                               break;
-                       reg |= EXTCNFCTR_MDIO_SW_OWNERSHIP;
-                       delay(2*1000);
-                       i++;
-               } while (i < WM_MDIO_OWNERSHIP_TIMEOUT);
+               wm_get_hw_semaphore_82573(sc);
                break;
        default:
                break;
@@ -4231,6 +4220,16 @@
                break;
        }
 
+	/* Must release the MDIO ownership after MAC reset */
+       switch (sc->sc_type) {
+       case WM_T_82574:
+       case WM_T_82583:
+               wm_put_hw_semaphore_82573(sc);
+               break;
+       default:
+               break;
+       }
+
        if (phy_reset != 0)
                wm_get_cfg_done(sc);
 
@@ -7524,6 +7523,43 @@
 }
 
 static int
+wm_get_hw_semaphore_82573(struct wm_softc *sc)
+{
+       int i = 0;
+       uint32_t reg;
+
+       reg = CSR_READ(sc, WMREG_EXTCNFCTR);
+       do {
+               CSR_WRITE(sc, WMREG_EXTCNFCTR,
+                   reg | EXTCNFCTR_MDIO_SW_OWNERSHIP);
+               reg = CSR_READ(sc, WMREG_EXTCNFCTR);
+               if ((reg & EXTCNFCTR_MDIO_SW_OWNERSHIP) != 0)
+                       break;
+               delay(2*1000);
+               i++;
+       } while (i < WM_MDIO_OWNERSHIP_TIMEOUT);
+
+       if (i == WM_MDIO_OWNERSHIP_TIMEOUT) {
+               wm_put_hw_semaphore_82573(sc);
+               log(LOG_ERR, "%s: Driver can't access the PHY\n",
+                   device_xname(sc->sc_dev));
+               return -1;
+       }
+
+       return 0;
+}
+
+static void
+wm_put_hw_semaphore_82573(struct wm_softc *sc)
+{
+       uint32_t reg;
+
+       reg = CSR_READ(sc, WMREG_EXTCNFCTR);
+       reg &= ~EXTCNFCTR_MDIO_SW_OWNERSHIP;
+       CSR_WRITE(sc, WMREG_EXTCNFCTR, reg);
+}
+
+static int
 wm_valid_nvm_bank_detect_ich8lan(struct wm_softc *sc, unsigned int *bank)
 {
        uint32_t eecd;


--
-----------------------------------------------
                SAITOH Masanobu (msaitoh%execsw.org@localhost
                                 msaitoh%netbsd.org@localhost)