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atf for atomic_ops(3)
I wrote atf tests for atomic_ops(3).
These does not test the atomicity but can find a easy bug.
Is this ok to commit?
(I know there is a similar path tests/lib/libc/sync but
I think it's better to not merge)
Thanks,
---
Tetsuya Isaki <isaki%pastel-flower.jp@localhost / isaki%NetBSD.org@localhost>
Index: distrib/sets/lists/tests/mi
===================================================================
RCS file: /cvsroot/src/distrib/sets/lists/tests/mi,v
retrieving revision 1.806
diff -u -r1.806 mi
--- distrib/sets/lists/tests/mi 9 Feb 2019 00:14:43 -0000 1.806
+++ distrib/sets/lists/tests/mi 17 Feb 2019 07:10:08 -0000
@@ -2442,6 +2442,15 @@
./usr/tests/lib/libc tests-lib-tests compattestfile,atf
./usr/tests/lib/libc/Atffile tests-lib-tests compattestfile,atf
./usr/tests/lib/libc/Kyuafile tests-lib-tests compattestfile,atf,kyua
+./usr/tests/lib/libc/atomic tests-lib-tests compattestfile,atf
+./usr/tests/lib/libc/atomic/Atffile tests-lib-tests compattestfile,atf
+./usr/tests/lib/libc/atomic/t_atomic_add tests-lib-tests compattestfile,atf
+./usr/tests/lib/libc/atomic/t_atomic_and tests-lib-tests compattestfile,atf
+./usr/tests/lib/libc/atomic/t_atomic_cas tests-lib-tests compattestfile,atf
+./usr/tests/lib/libc/atomic/t_atomic_dec tests-lib-tests compattestfile,atf
+./usr/tests/lib/libc/atomic/t_atomic_inc tests-lib-tests compattestfile,atf
+./usr/tests/lib/libc/atomic/t_atomic_or tests-lib-tests compattestfile,atf
+./usr/tests/lib/libc/atomic/t_atomic_swap tests-lib-tests compattestfile,atf
./usr/tests/lib/libc/c063 tests-lib-tests compattestfile,atf
./usr/tests/lib/libc/c063/Atffile tests-lib-tests compattestfile,atf
./usr/tests/lib/libc/c063/Kyuafile tests-lib-tests compattestfile,atf,kyua
Index: tests/lib/libc/Makefile
===================================================================
RCS file: /cvsroot/src/tests/lib/libc/Makefile,v
retrieving revision 1.48
diff -u -r1.48 Makefile
--- tests/lib/libc/Makefile 3 Aug 2018 04:24:41 -0000 1.48
+++ tests/lib/libc/Makefile 17 Feb 2019 07:10:55 -0000
@@ -5,6 +5,7 @@
SUBDIR+= tls_dso .WAIT sync
+TESTS_SUBDIRS+= atomic
TESTS_SUBDIRS+= c063 db gen hash inet locale misc net regex rpc setjmp stdlib
TESTS_SUBDIRS+= stdio string sys termios time tls ttyio
--- /dev/null 2019-02-17 16:04:39.000000000 +0900
+++ tests/lib/libc/atomic/Makefile 2019-02-16 13:02:37.000000000 +0900
@@ -0,0 +1,19 @@
+# $NetBSD$
+
+.include <bsd.own.mk>
+
+TESTSDIR= ${TESTSBASE}/lib/libc/atomic
+
+TESTS_C+= t_atomic_add
+TESTS_C+= t_atomic_and
+TESTS_C+= t_atomic_cas
+TESTS_C+= t_atomic_dec
+TESTS_C+= t_atomic_inc
+TESTS_C+= t_atomic_or
+TESTS_C+= t_atomic_swap
+
+MKMAN=no
+
+BINDIR= ${TESTSDIR}
+
+.include <bsd.test.mk>
--- /dev/null 2019-02-17 16:04:39.000000000 +0900
+++ tests/lib/libc/atomic/t_atomic_add.c 2019-02-16 19:25:48.000000000 +0900
@@ -0,0 +1,102 @@
+/* $NetBSD$ */
+
+/* XXX License */
+
+#include <sys/cdefs.h>
+__RCSID("$NetBSD$");
+
+#include <atf-c.h>
+#include <atomic.h>
+#include <inttypes.h>
+
+/*
+ * These tests don't examine the atomicity.
+ */
+
+#define DST (0x1122334455667788UL)
+#define SRC (0xf0e0d0c0b0a09081UL)
+#define EXPECT (0x0203040506070809UL)
+
+/*
+ * atomic_add_*()
+ */
+#define atf_add(NAME, DTYPE, STYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile DTYPE val; \
+ STYPE src; \
+ DTYPE exp; \
+ val = (DTYPE)DST; \
+ src = (STYPE)SRC; \
+ exp = (DTYPE)EXPECT; \
+ NAME(&val, src); \
+ ATF_REQUIRE_MSG(val == exp, \
+ "val expects " FMT " but " FMT, exp, val); \
+}
+
+atf_add(atomic_add_32, uint32_t, int32_t, "0x%" PRIx32);
+atf_add(atomic_add_int, unsigned int, int, "0x%x");
+atf_add(atomic_add_long, unsigned long, long, "0x%lx");
+atf_add(atomic_add_ptr, void *, ssize_t, "%p");
+#if defined(__HAVE_ATOMIC64_OPS)
+atf_add(atomic_add_64, uint64_t, int64_t, "0x%" PRIx64);
+#endif
+
+/*
+ * atomic_add_*_nv()
+ */
+#define atf_add_nv(NAME, DTYPE, STYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile DTYPE val; \
+ STYPE src; \
+ DTYPE res; \
+ DTYPE exp; \
+ val = (DTYPE)DST; \
+ src = (STYPE)SRC; \
+ exp = (DTYPE)EXPECT; \
+ res = NAME(&val, src); \
+ ATF_REQUIRE_MSG(val == exp, \
+ "val expects " FMT " but " FMT, exp, val); \
+ ATF_REQUIRE_MSG(res == exp, \
+ "res expects " FMT " but " FMT, exp, res); \
+}
+
+atf_add_nv(atomic_add_32_nv, uint32_t, int32_t, "0x%" PRIx32);
+atf_add_nv(atomic_add_int_nv, unsigned int, int, "0x%x");
+atf_add_nv(atomic_add_long_nv, unsigned long, long, "0x%lx");
+atf_add_nv(atomic_add_ptr_nv, void *, ssize_t, "%p");
+#if defined(__HAVE_ATOMIC64_OPS)
+atf_add_nv(atomic_add_64_nv, uint64_t, int64_t, "0x%" PRIx64);
+#endif
+
+ATF_TP_ADD_TCS(tp)
+{
+ ATF_TP_ADD_TC(tp, atomic_add_32);
+ ATF_TP_ADD_TC(tp, atomic_add_int);
+ ATF_TP_ADD_TC(tp, atomic_add_long);
+ ATF_TP_ADD_TC(tp, atomic_add_ptr);
+#if defined(__HAVE_ATOMIC64_OPS)
+ ATF_TP_ADD_TC(tp, atomic_add_64);
+#endif
+
+ ATF_TP_ADD_TC(tp, atomic_add_32_nv);
+ ATF_TP_ADD_TC(tp, atomic_add_int_nv);
+ ATF_TP_ADD_TC(tp, atomic_add_long_nv);
+ ATF_TP_ADD_TC(tp, atomic_add_ptr_nv);
+#if defined(__HAVE_ATOMIC64_OPS)
+ ATF_TP_ADD_TC(tp, atomic_add_64_nv);
+#endif
+
+ return atf_no_error();
+}
--- /dev/null 2019-02-17 16:04:39.000000000 +0900
+++ tests/lib/libc/atomic/t_atomic_and.c 2019-02-16 16:18:23.000000000 +0900
@@ -0,0 +1,98 @@
+/* $NetBSD$ */
+
+/* XXX License */
+
+#include <sys/cdefs.h>
+__RCSID("$NetBSD$");
+
+#include <atf-c.h>
+#include <atomic.h>
+#include <inttypes.h>
+
+/*
+ * These tests don't examine the atomicity.
+ */
+
+#define DST (0x1122334455667788UL)
+#define SRC (0xf0f0f0f0f0f0f0f0UL)
+#define EXPECT (0x1020304050607080UL)
+
+/*
+ * atomic_and_*()
+ */
+#define atf_and(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE src; \
+ TYPE exp; \
+ val = (TYPE)DST; \
+ src = (TYPE)SRC; \
+ exp = (TYPE)EXPECT; \
+ NAME(&val, src); \
+ ATF_REQUIRE_MSG(val == exp, \
+ "val expects 0x%" FMT " but 0x%" FMT, exp, val); \
+}
+
+atf_and(atomic_and_32, uint32_t, PRIx32);
+atf_and(atomic_and_uint, unsigned int, "x");
+atf_and(atomic_and_ulong, unsigned long, "lx");
+#if defined(__HAVE_ATOMIC64_OPS)
+atf_and(atomic_and_64, uint64_t, PRIx64);
+#endif
+
+/*
+ * atomic_and_*_nv()
+ */
+#define atf_and_nv(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE src; \
+ TYPE res; \
+ TYPE exp; \
+ val = (TYPE)DST; \
+ src = (TYPE)SRC; \
+ exp = (TYPE)EXPECT; \
+ res = NAME(&val, src); \
+ ATF_REQUIRE_MSG(val == exp, \
+ "val expects 0x%" FMT " but 0x%" FMT, exp, val); \
+ ATF_REQUIRE_MSG(res == exp, \
+ "res expects 0x%" FMT " but 0x%" FMT, exp, res); \
+}
+
+atf_and_nv(atomic_and_32_nv, uint32_t, PRIx32);
+atf_and_nv(atomic_and_uint_nv, unsigned int, "x");
+atf_and_nv(atomic_and_ulong_nv, unsigned long, "lx");
+#if defined(__HAVE_ATOMIC64_OPS)
+atf_and_nv(atomic_and_64_nv, uint64_t, PRIx64);
+#endif
+
+ATF_TP_ADD_TCS(tp)
+{
+ ATF_TP_ADD_TC(tp, atomic_and_32);
+ ATF_TP_ADD_TC(tp, atomic_and_uint);
+ ATF_TP_ADD_TC(tp, atomic_and_ulong);
+#if defined(__HAVE_ATOMIC64_OPS)
+ ATF_TP_ADD_TC(tp, atomic_and_64);
+#endif
+
+ ATF_TP_ADD_TC(tp, atomic_and_32_nv);
+ ATF_TP_ADD_TC(tp, atomic_and_uint_nv);
+ ATF_TP_ADD_TC(tp, atomic_and_ulong_nv);
+#if defined(__HAVE_ATOMIC64_OPS)
+ ATF_TP_ADD_TC(tp, atomic_and_64_nv);
+#endif
+
+ return atf_no_error();
+}
--- /dev/null 2019-02-17 16:04:39.000000000 +0900
+++ tests/lib/libc/atomic/t_atomic_cas.c 2019-02-16 16:18:25.000000000 +0900
@@ -0,0 +1,95 @@
+/* $NetBSD$ */
+
+/* XXX License */
+
+#include <sys/cdefs.h>
+__RCSID("$NetBSD$");
+
+#include <atf-c.h>
+#include <atomic.h>
+#include <inttypes.h>
+
+/*
+ * These tests don't examine the atomicity.
+ */
+
+#define OLDVAL (0x1122334455667788UL)
+#define NEWVAL (0x8090a0b0c0d0e0f0UL)
+
+/*
+ * atomic_cas_*{,_ni}()
+ */
+#define atf_cas(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE oldval; \
+ TYPE newval; \
+ TYPE expval; \
+ TYPE expres; \
+ TYPE res; \
+ /* If successful */ \
+ val = (TYPE)OLDVAL; \
+ oldval = (TYPE)OLDVAL; \
+ newval = (TYPE)NEWVAL; \
+ expval = (TYPE)NEWVAL; \
+ expres = (TYPE)OLDVAL; \
+ res = NAME(&val, oldval, newval); \
+ ATF_REQUIRE_MSG(val == expval, \
+ "successful case: val expects " FMT " but " FMT, expval, val); \
+ ATF_REQUIRE_MSG(res == expres, \
+ "successful case: res expects " FMT " but " FMT, expres, res); \
+ /* If failure */ \
+ val = (TYPE)OLDVAL; \
+ oldval = (TYPE)(OLDVAL + 1); \
+ newval = (TYPE)NEWVAL; \
+ expval = (TYPE)OLDVAL; \
+ expres = (TYPE)OLDVAL; \
+ res = NAME(&val, oldval, newval); \
+ ATF_REQUIRE_MSG(val == expval, \
+ "failure case: val expects " FMT " but " FMT, expval, val); \
+ ATF_REQUIRE_MSG(res == expres, \
+ "failure case: res expects " FMT " but " FMT, expres, res); \
+}
+
+atf_cas(atomic_cas_32, uint32_t, "0x%" PRIx32);
+atf_cas(atomic_cas_uint, unsigned int, "0x%x");
+atf_cas(atomic_cas_ulong, unsigned long, "0x%lx");
+atf_cas(atomic_cas_ptr, void *, "%p");
+#if defined(__HAVE_ATOMIC64_OPS)
+atf_cas(atomic_cas_64, uint64_t, "0x%" PRIx64);
+#endif
+
+atf_cas(atomic_cas_32_ni, uint32_t, "0x%" PRIx32);
+atf_cas(atomic_cas_uint_ni, unsigned int, "0x%x");
+atf_cas(atomic_cas_ulong_ni, unsigned long, "0x%lx");
+atf_cas(atomic_cas_ptr_ni, void *, "%p");
+#if defined(__HAVE_ATOMIC64_OPS)
+atf_cas(atomic_cas_64_ni, uint64_t, "0x%" PRIx64);
+#endif
+
+ATF_TP_ADD_TCS(tp)
+{
+ ATF_TP_ADD_TC(tp, atomic_cas_32);
+ ATF_TP_ADD_TC(tp, atomic_cas_uint);
+ ATF_TP_ADD_TC(tp, atomic_cas_ulong);
+ ATF_TP_ADD_TC(tp, atomic_cas_ptr);
+#if defined(__HAVE_ATOMIC64_OPS)
+ ATF_TP_ADD_TC(tp, atomic_cas_64);
+#endif
+
+ ATF_TP_ADD_TC(tp, atomic_cas_32_ni);
+ ATF_TP_ADD_TC(tp, atomic_cas_uint_ni);
+ ATF_TP_ADD_TC(tp, atomic_cas_ulong_ni);
+ ATF_TP_ADD_TC(tp, atomic_cas_ptr_ni);
+#if defined(__HAVE_ATOMIC64_OPS)
+ ATF_TP_ADD_TC(tp, atomic_cas_64_ni);
+#endif
+
+ return atf_no_error();
+}
--- /dev/null 2019-02-17 16:04:39.000000000 +0900
+++ tests/lib/libc/atomic/t_atomic_dec.c 2019-02-16 16:18:26.000000000 +0900
@@ -0,0 +1,97 @@
+/* $NetBSD$ */
+
+/* XXX License */
+
+#include <sys/cdefs.h>
+__RCSID("$NetBSD$");
+
+#include <atf-c.h>
+#include <atomic.h>
+#include <inttypes.h>
+
+/*
+ * These tests don't examine the atomicity.
+ */
+
+#define VAL (0x1122334455667788UL)
+#define EXPECT (0x1122334455667787UL)
+
+/*
+ * atomic_dec_*()
+ */
+#define atf_dec(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE exp; \
+ val = (TYPE)VAL; \
+ exp = (TYPE)EXPECT; \
+ NAME(&val); \
+ ATF_REQUIRE_MSG(val == exp, \
+ "val expects " FMT " but " FMT, exp, val); \
+}
+
+atf_dec(atomic_dec_32, uint32_t, "0x%" PRIx32);
+atf_dec(atomic_dec_uint, unsigned int, "0x%x");
+atf_dec(atomic_dec_ulong, unsigned long, "0x%lx");
+atf_dec(atomic_dec_ptr, void *, "%p");
+#if defined(__HAVE_ATOMIC64_OPS)
+atf_dec(atomic_dec_64, uint64_t, "0x%" PRIx64);
+#endif
+
+/*
+ * atomic_dec_*_nv()
+ */
+#define atf_dec_nv(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE res; \
+ TYPE exp; \
+ val = (TYPE)VAL; \
+ exp = (TYPE)EXPECT; \
+ res = NAME(&val); \
+ ATF_REQUIRE_MSG(val == exp, \
+ "val expects " FMT " but " FMT, exp, val); \
+ ATF_REQUIRE_MSG(res == exp, \
+ "res expects " FMT " but " FMT, exp, res); \
+}
+
+atf_dec_nv(atomic_dec_32_nv, uint32_t, "0x%" PRIx32);
+atf_dec_nv(atomic_dec_uint_nv, unsigned int, "0x%x");
+atf_dec_nv(atomic_dec_ulong_nv, unsigned long, "0x%lx");
+atf_dec_nv(atomic_dec_ptr_nv, void *, "%p");
+#if defined(__HAVE_ATOMIC64_OPS)
+atf_dec_nv(atomic_dec_64_nv, uint64_t, "0x%" PRIx64);
+#endif
+
+ATF_TP_ADD_TCS(tp)
+{
+ ATF_TP_ADD_TC(tp, atomic_dec_32);
+ ATF_TP_ADD_TC(tp, atomic_dec_uint);
+ ATF_TP_ADD_TC(tp, atomic_dec_ulong);
+ ATF_TP_ADD_TC(tp, atomic_dec_ptr);
+#if defined(__HAVE_ATOMIC64_OPS)
+ ATF_TP_ADD_TC(tp, atomic_dec_64);
+#endif
+
+ ATF_TP_ADD_TC(tp, atomic_dec_32_nv);
+ ATF_TP_ADD_TC(tp, atomic_dec_uint_nv);
+ ATF_TP_ADD_TC(tp, atomic_dec_ulong_nv);
+ ATF_TP_ADD_TC(tp, atomic_dec_ptr_nv);
+#if defined(__HAVE_ATOMIC64_OPS)
+ ATF_TP_ADD_TC(tp, atomic_dec_64_nv);
+#endif
+
+ return atf_no_error();
+}
--- /dev/null 2019-02-17 16:04:39.000000000 +0900
+++ tests/lib/libc/atomic/t_atomic_inc.c 2019-02-16 16:18:29.000000000 +0900
@@ -0,0 +1,97 @@
+/* $NetBSD$ */
+
+/* XXX License */
+
+#include <sys/cdefs.h>
+__RCSID("$NetBSD$");
+
+#include <atf-c.h>
+#include <atomic.h>
+#include <inttypes.h>
+
+/*
+ * These tests don't examine the atomicity.
+ */
+
+#define VAL (0x1122334455667788UL)
+#define EXPECT (0x1122334455667789UL)
+
+/*
+ * atomic_inc_*()
+ */
+#define atf_inc(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE exp; \
+ val = (TYPE)VAL; \
+ exp = (TYPE)EXPECT; \
+ NAME(&val); \
+ ATF_REQUIRE_MSG(val == exp, \
+ "val expects " FMT " but " FMT, exp, val); \
+}
+
+atf_inc(atomic_inc_32, uint32_t, "0x%" PRIx32);
+atf_inc(atomic_inc_uint, unsigned int, "0x%x");
+atf_inc(atomic_inc_ulong, unsigned long, "0x%lx");
+atf_inc(atomic_inc_ptr, void *, "%p");
+#if defined(__HAVE_ATOMIC64_OPS)
+atf_inc(atomic_inc_64, uint64_t, "0x%" PRIx64);
+#endif
+
+/*
+ * atomic_inc_*_nv()
+ */
+#define atf_inc_nv(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE res; \
+ TYPE exp; \
+ val = (TYPE)VAL; \
+ exp = (TYPE)EXPECT; \
+ res = NAME(&val); \
+ ATF_REQUIRE_MSG(val == exp, \
+ "val expects " FMT " but " FMT, exp, val); \
+ ATF_REQUIRE_MSG(res == exp, \
+ "res expects " FMT " but " FMT, exp, res); \
+}
+
+atf_inc_nv(atomic_inc_32_nv, uint32_t, "0x%" PRIx32);
+atf_inc_nv(atomic_inc_uint_nv, unsigned int, "0x%x");
+atf_inc_nv(atomic_inc_ulong_nv, unsigned long, "0x%lx");
+atf_inc_nv(atomic_inc_ptr_nv, void *, "%p");
+#if defined(__HAVE_ATOMIC64_OPS)
+atf_inc_nv(atomic_inc_64_nv, uint64_t, "0x%" PRIx64);
+#endif
+
+ATF_TP_ADD_TCS(tp)
+{
+ ATF_TP_ADD_TC(tp, atomic_inc_32);
+ ATF_TP_ADD_TC(tp, atomic_inc_uint);
+ ATF_TP_ADD_TC(tp, atomic_inc_ulong);
+ ATF_TP_ADD_TC(tp, atomic_inc_ptr);
+#if defined(__HAVE_ATOMIC64_OPS)
+ ATF_TP_ADD_TC(tp, atomic_inc_64);
+#endif
+
+ ATF_TP_ADD_TC(tp, atomic_inc_32_nv);
+ ATF_TP_ADD_TC(tp, atomic_inc_uint_nv);
+ ATF_TP_ADD_TC(tp, atomic_inc_ulong_nv);
+ ATF_TP_ADD_TC(tp, atomic_inc_ptr_nv);
+#if defined(__HAVE_ATOMIC64_OPS)
+ ATF_TP_ADD_TC(tp, atomic_inc_64_nv);
+#endif
+
+ return atf_no_error();
+}
--- /dev/null 2019-02-17 16:04:39.000000000 +0900
+++ tests/lib/libc/atomic/t_atomic_or.c 2019-02-16 16:18:31.000000000 +0900
@@ -0,0 +1,98 @@
+/* $NetBSD$ */
+
+/* XXX License */
+
+#include <sys/cdefs.h>
+__RCSID("$NetBSD$");
+
+#include <atf-c.h>
+#include <atomic.h>
+#include <inttypes.h>
+
+/*
+ * These tests don't examine the atomicity.
+ */
+
+#define DST (0x1122334455667788UL)
+#define SRC (0xf0f0f0f0f0f0f0f0UL)
+#define EXPECT (0xf1f2f3f4f5f6f7f8UL)
+
+/*
+ * atomic_or_*()
+ */
+#define atf_or(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE src; \
+ TYPE exp; \
+ val = (TYPE)DST; \
+ src = (TYPE)SRC; \
+ exp = (TYPE)EXPECT; \
+ NAME(&val, src); \
+ ATF_REQUIRE_MSG(val == exp, \
+ "val expects 0x%" FMT " but 0x%" FMT, exp, val); \
+}
+
+atf_or(atomic_or_32, uint32_t, PRIx32);
+atf_or(atomic_or_uint, unsigned int, "x");
+atf_or(atomic_or_ulong, unsigned long, "lx");
+#if defined(__HAVE_ATOMIC64_OPS)
+atf_or(atomic_or_64, uint64_t, PRIx64);
+#endif
+
+/*
+ * atomic_or_*_nv()
+ */
+#define atf_or_nv(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE src; \
+ TYPE res; \
+ TYPE exp; \
+ val = (TYPE)DST; \
+ src = (TYPE)SRC; \
+ exp = (TYPE)EXPECT; \
+ res = NAME(&val, src); \
+ ATF_REQUIRE_MSG(val == exp, \
+ "val expects 0x%" FMT " but 0x%" FMT, exp, val); \
+ ATF_REQUIRE_MSG(res == exp, \
+ "res expects 0x%" FMT " but 0x%" FMT, exp, res); \
+}
+
+atf_or_nv(atomic_or_32_nv, uint32_t, PRIx32);
+atf_or_nv(atomic_or_uint_nv, unsigned int, "x");
+atf_or_nv(atomic_or_ulong_nv, unsigned long, "lx");
+#if defined(__HAVE_ATOMIC64_OPS)
+atf_or_nv(atomic_or_64_nv, uint64_t, PRIx64);
+#endif
+
+ATF_TP_ADD_TCS(tp)
+{
+ ATF_TP_ADD_TC(tp, atomic_or_32);
+ ATF_TP_ADD_TC(tp, atomic_or_uint);
+ ATF_TP_ADD_TC(tp, atomic_or_ulong);
+#if defined(__HAVE_ATOMIC64_OPS)
+ ATF_TP_ADD_TC(tp, atomic_or_64);
+#endif
+
+ ATF_TP_ADD_TC(tp, atomic_or_32_nv);
+ ATF_TP_ADD_TC(tp, atomic_or_uint_nv);
+ ATF_TP_ADD_TC(tp, atomic_or_ulong_nv);
+#if defined(__HAVE_ATOMIC64_OPS)
+ ATF_TP_ADD_TC(tp, atomic_or_64_nv);
+#endif
+
+ return atf_no_error();
+}
--- /dev/null 2019-02-17 16:04:39.000000000 +0900
+++ tests/lib/libc/atomic/t_atomic_swap.c 2019-02-16 16:18:33.000000000 +0900
@@ -0,0 +1,65 @@
+/* $NetBSD$ */
+
+/* XXX License */
+
+#include <sys/cdefs.h>
+__RCSID("$NetBSD$");
+
+#include <atf-c.h>
+#include <atomic.h>
+#include <inttypes.h>
+
+/*
+ * These tests don't examine the atomicity.
+ */
+
+#define OLDVAL (0x1122334455667788UL)
+#define NEWVAL (0x8090a0b0c0d0e0f0UL)
+
+/*
+ * atomic_swap_*()
+ */
+#define atf_swap(NAME, TYPE, FMT) \
+ATF_TC(NAME); \
+ATF_TC_HEAD(NAME, tc) \
+{ \
+ atf_tc_set_md_var(tc, "descr", #NAME); \
+} \
+ATF_TC_BODY(NAME, tc) \
+{ \
+ volatile TYPE val; \
+ TYPE newval; \
+ TYPE expval; \
+ TYPE expres; \
+ TYPE res; \
+ val = (TYPE)OLDVAL; \
+ newval = (TYPE)NEWVAL; \
+ expval = (TYPE)NEWVAL; \
+ expres = (TYPE)OLDVAL; \
+ res = NAME(&val, newval); \
+ ATF_REQUIRE_MSG(val == expval, \
+ "val expects " FMT " but " FMT, expval, val); \
+ ATF_REQUIRE_MSG(res == expres, \
+ "res expects " FMT " but " FMT, expres, res); \
+}
+
+atf_swap(atomic_swap_32, uint32_t, "0x%" PRIx32);
+atf_swap(atomic_swap_uint, unsigned int, "0x%x");
+atf_swap(atomic_swap_ulong, unsigned long, "0x%lx");
+atf_swap(atomic_swap_ptr, void *, "%p");
+#if defined(__HAVE_ATOMIC64_OPS)
+atf_swap(atomic_swap_64, uint64_t, "0x%" PRIx64);
+#endif
+
+ATF_TP_ADD_TCS(tp)
+{
+ ATF_TP_ADD_TC(tp, atomic_swap_32);
+ ATF_TP_ADD_TC(tp, atomic_swap_uint);
+ ATF_TP_ADD_TC(tp, atomic_swap_ulong);
+ ATF_TP_ADD_TC(tp, atomic_swap_ptr);
+#if defined(__HAVE_ATOMIC64_OPS)
+ ATF_TP_ADD_TC(tp, atomic_swap_64);
+#endif
+
+ return atf_no_error();
+}
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