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Re: workaround intel apollo lake errata



On Sun, Jul 01, 2018 at 12:19:22PM +0200, Maxime Villard wrote:
> Pay attention to 325384-sdm-vol-3abcd.pdf, page 1314/2008:
> 
> 	"If the SSE3 feature flag ECX[0] is not set (CPUID.01H:ECX[bit 0] = 0),
> 	 the OS must not attempt to alter this bit. BIOS must leave it in the
> 	 default state. Writing this bit when the SSE3 feature flag is set to
> 	 0 may generate a #GP exception."
> 
> Are you sure the affected family-model-stepping CPUs have the SSE3 feature
> flag? Because if they don't you can't clear the bit.

I'll try to check for extra verification.

> Otherwise it doesn't look incorrect to me. However you may want to reapply the
> wrmsr after an ACPI wakeup, because chances are it got reset. But I guess it
> doesn't matter a lot since there are countless MSRs we don't reapply, so it's
> not like it's not already broken.

I actually don't rely on wrmsr, we check everywhere for cpu_feature or
similar, but it felt error-prone to leave it as-is.


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