Re: Access to DMA memory while DMA in progress?

[Mouse <mouse%Rodents-Montreal.ORG@localhost>]

>> I would like to read the DMA buffer while DMA is still going on.
>> [...]  I'm fine if the CPU's view lags the hardware's view slightly,
>> but I do care about the CPU's view of the DMA write order matching
>> the hardware's: that is, if the CPU sees the value written by a
>> given DMA cycle, then the CPU must also see the values written by
>> all previous DMA cycles.
> I'm not sure if that requirement is necessarily supported by hardware.  For $

Hm!  On such hardware, then, you can't count on any particular portion
of a DMA transfer being visible until the whole transfer is finished?

For my purposes, unelss amd64 is such a platform, I'm willing to write
off portability to such machines.  Is there any way to detect them from
within the driver?  I could just ignore the issue, but I'd prefer to
give an error at attach time.

/~\ The ASCII				  Mouse
\ / Ribbon Campaign
 X  Against HTML		mouse%rodents-montreal.org@localhost
/ \ Email!	     7D C8 61 52 5D E7 2D 39  4E F1 31 3E E8 B3 27 4B