Re: Understanding PR kern/43997 (kernel timing problems / qemu)

[mlelstv%serpens.de@localhost (Michael van Elst)]

kre%munnari.OZ.AU@localhost (Robert Elz) writes:

>  | This is not to be confused with the kernel idea of wall-clock time
>  | (i.e. what date reports). wall-clock time is usually maintained
>  | by hardware seperated from the interrupt timers. The 'date; sleep 5; date'
>  | sequence therefore can show that 10 seconds passed.

>But that is totally broken.


Broken is the HZ=100 configuration that doesn't match the broken (emulated)
hardware.

Given a sane time reference you could adjust HZ automatically. Without
you could make it a boot time parameter.

For the Anita test harness you could probably just boot into ddb and set
the hz variable.

-- 
-- 
                                Michael van Elst
Internet: mlelstv%serpens.de@localhost
                                "A potential Snark may lurk in every tree."